Abstract: A highly accurate feature extraction is performed on a signal with temporal variation in amplitude, and this signal is restored to detect a state of a transmission source (output source) of this signal to be normal or abnormal. A signal processing method includes: separating a signal X into an oscillation signal with a constant amplitude X1 and a signal with temporal variation in amplitude X2, the separating performed by a signal separator; performing processing of dimensionality reduction, compression, or the like, on the oscillation signal X1 so as to extract a feature value (information) included in the oscillation signal X1; and outputting a restored signal X1? that is restored from the oscillation signal X1 by performing processing inverse to the processing of dimensionality reduction, compression, or the like, based on the extracted feature value, performing the processing, the inverse processing, and the outputting performed by a signal X1 restorer.

Abstract: A silicon oxide film on which a capacitor of a semiconductor integrated circuit device is formed is formed by the plasma CVD method at a temperature of 450° C. to 700° C. In this semiconductor integrated circuit device, a memory cell formed of a MISFET for data transfer and a capacitor is formed in a memory cell forming area, and an n channel MISFET and a p channel MISFET constituting a logic circuit is formed in a logic circuit forming area. As a result, the amount of degassing from the silicon oxide film can be reduced. Therefore, the growth of silicon grains on a surface of the silicon film constituting a lower electrode of the capacitor is not hindered by the degassing, and it becomes possible to increase the capacitance. Also, the step of a heat treatment for removing the moisture and the like after forming the silicon oxide film can be omitted, and it becomes possible to prevent the deterioration of the property of the MISFET.

Abstract: A silicon oxide film on which a capacitor of a semiconductor integrated circuit device is formed is formed by the plasma CVD method at a temperature of 450° C. to 700° C. In this semiconductor integrated circuit device, a memory cell formed of a MISFET for data transfer and a capacitor is formed in a memory cell forming area, and an n channel MISFET and a p channel MISFET constituting a logic circuit is formed in a logic circuit forming area. As a result, the amount of degassing from the silicon oxide film can be reduced. Therefore, the growth of silicon grains on a surface of the silicon film constituting a lower electrode of the capacitor is not hindered by the degassing, and it becomes possible to increase the capacitance. Also, the step of a heat treatment for removing the moisture and the like after forming the silicon oxide film can be omitted, and it becomes possible to prevent the deterioration of the property of the MISFET.

Abstract: A disadvantage upon heat treatment in an oxygen atmosphere of a dielectric film formed on a lower electrode of capacitance device of DRAM that oxygen permeating the lower electrode oxidizes a barrier layer to form an oxide layer of high resistance and low dielectric constant is prevented. An Ru silicide layer is formed on the surface of a plug in a through hole formed below a lower electrode for an information storage capacitance device C and an Ru silicon nitride layer is formed further on the surface of the Ru silicide layer. Upon high temperature heat treatment in an oxygen atmosphere conducted in the step of forming a dielectric film on the lower electrode, the Ru silicon nitride layer is oxidized sacrificially into an Ru silicon oxynitride to prevent progress of oxidation in the Ru silicide layer.

Abstract: A disadvantage upon heat treatment in an oxygen atmosphere of a dielectric film formed on a lower electrode of capacitance device of DRAM that oxygen permeating the lower electrode oxidizes a barrier layer to form an oxide layer of high resistance and low dielectric constant is prevented. An Ru silicide layer is formed on the surface of a plug in a through hole formed below a lower electrode for an information storage capacitance device C and an Ru silicon nitride layer is formed further on the surface of the Ru silicide layer. Upon high temperature heat treatment in an oxygen atmosphere conducted in the step of forming a dielectric film on the lower electrode, the Ru silicon nitride layer is oxidized sacrificially into an Ru silicon oxynitride to prevent progress of oxidation in the Ru silicide layer.

Abstract: A silicon oxide film on which a capacitor of a semiconductor integrated circuit device is formed is formed by the plasma CVD method at a temperature of 450° C. to 700° C. In this semiconductor integrated circuit device, a memory cell formed of a MISFET for data transfer and a capacitor is formed in a memory cell forming area, and an n channel MISFET and a p channel MISFET constituting a logic circuit is formed in a logic circuit forming area. As a result, the amount of degassing from the silicon oxide film can be reduced. Therefore, the growth of silicon grains on a surface of the silicon film constituting a lower electrode of the capacitor is not hindered by the degassing, and it becomes possible to increase the capacitance. Also, the step of a heat treatment for removing the moisture and the like after forming the silicon oxide film can be omitted, and it becomes possible to prevent the deterioration of the property of the MISFET.

Abstract: A disadvantage upon heat treatment in an oxygen atmosphere of a dielectric film formed on a lower electrode of capacitance device of DRAM that oxygen permeating the lower electrode oxidizes a barrier layer to form an oxide layer of high resistance and low dielectric constant is prevented. An Ru silicide layer is formed on the surface of a plug in a through hole formed below a lower electrode for an information storage capacitance device C and an Ru silicon nitride layer is formed further on the surface of the Ru silicide layer. Upon high temperature heat treatment in an oxygen atmosphere conducted in the step of forming a dielectric film on the lower electrode, the Ru silicon nitride layer is oxidized sacrificially into an Ru silicon oxynitride to prevent progress of oxidation in the Ru silicide layer.

Abstract: A semiconductor device includes a DRAM having a memory cell constructed by an information storage capacitor C which is comprised of a lower electrode 54 made of a ruthenium film and an upper electrode 62 made of a capacity insulating film 61 and a titanium nitride film and which is connected in series with a memory cell selection MISFET Qs formed on the main surface of a semiconductor substrate 1. The capacity insulating film 61 is made of a multi layered film comprising two layered crystallized tantalum oxide films 56 and 58 each having a film thickness of 10 nm or less. The film thickness of the capacity insulating film 61 is set to 10 to 40 nm.

Abstract: A disadvantage upon heat treatment in an oxygen atmosphere of a dielectric film formed on a lower electrode of capacitance device of DRAM that oxygen permeating the lower electrode oxidizes a barrier layer to form an oxide layer of high resistance and low dielectric constant is prevented. An Ru silicide layer is formed on the surface of a plug in a through hole formed below a lower electrode for an information storage capacitance device C and an Ru silicon nitride layer is formed further on the surface of the Ru silicide layer. Upon high temperature heat treatment in an oxygen atmosphere conducted in the step of forming a dielectric film on the lower electrode, the Ru silicon nitride layer is oxidized sacrificially into an Ru silicon oxynitride to prevent progress of oxidation in the Ru silicide layer.

Abstract: A semiconductor device includes a DRAM having a memory cell constructed by an information storage capacitor C which is comprised of a lower electrode 54 made of a ruthenium film and an upper electrode 62 made of a capacity insulating film 61 and a titanium nitride film and which is connected in series with a memory cell selection MISFET Qs formed on the main surface of a semiconductor substrate 1. The capacity insulating film 61 is made of a multi layered film comprising two layered crystallized tantalum oxide films 56 and 58 each having a film thickness of 10 nm or less. The film thickness of the capacity insulating film 61 is set to 10 to 40 nm.

Abstract: A semiconductor device includes a DRAM having a memory cell constructed by an information storage capacitor C which is comprised of a lower electrode 54 made of a ruthenium film and an upper electrode 62 made of a capacity insulating film 61 and a titanium nitride film and which is connected in series with a memory cell selection MISFET Qs formed on the main surface of a semiconductor substrate 1. The capacity insulating film 61 is made of a multi layered film comprising two layered crystallized tantalum oxide films 56 and 58 each having a film thickness of 10 nm or less. The film thickness of the capacity insulating film 61 is set to 10 to 40 nm.

Abstract: In one embodiment, the present invention provides a method of treating a dielectric layer 24. First, the dielectric layer is heated while being subjected to an O.sub.2 plasma. After that, the dielectric layer is heated while being subject to an ozone environment. This method can be useful in forming a capacitor 12 dielectric 24. In turn, the capacitor could be used in a DRAM memory device.