Patents by Inventor Masato Maede

Masato Maede has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11892248
    Abstract: A cooling unit includes a unit main body including a bottom portion, a peripheral wall portion rising from the peripheral edge of the bottom portion, and a seal for sealing an opening of the unit main body. The unit main body is joined to the seal through a plasticized region, and a void is defined in the peripheral wall portion of the unit main body.
    Type: Grant
    Filed: May 24, 2022
    Date of Patent: February 6, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Shozo Ochi, Masato Maede, Tomonari Nebashi, Ryo Ishikawa
  • Publication number: 20220397353
    Abstract: A cooling unit includes a unit main body including a bottom portion, a peripheral wall portion rising from the peripheral edge of the bottom portion, and a sealing body for sealing an opening of the unit main body. The unit main body is joined to the sealing body through a plasticized region, and a void is formed at a position close to the unit main body with respect to a center of the plasticized region.
    Type: Application
    Filed: May 24, 2022
    Publication date: December 15, 2022
    Inventors: SHOZO OCHI, MASATO MAEDE, TOMONARI NEBASHI, RYO ISHIKAWA
  • Patent number: 11270821
    Abstract: A soft magnetic powder that can exhibit desirable soft magnetic characteristics. A dust core using the soft magnetic powder is also provided. The soft magnetic powder includes: a soft magnetic powder layer of an unoxidized soft magnetic material; a second oxide layer as an oxide with iron or boron residing around the soft magnetic powder layer; and a first oxide layer of an iron oxide residing around the second oxide layer. The first oxide layer and the second oxide layer reside in a region of 20 nm or more and 500 nm or less from a surface of the soft magnetic powder, and are absent in a region of more than 500 nm and 1,600 nm or less from the surface.
    Type: Grant
    Filed: June 26, 2018
    Date of Patent: March 8, 2022
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Masato Maede, Kazuto Fukuda, Toshiyuki Kojima, Mitsuo Saitoh
  • Patent number: 11195646
    Abstract: Provided herein is a soft magnetic alloy powder that can exhibit a high saturation flux density and desirable soft magnetic characteristics. A dust core using the soft magnetic alloy powder is also provided. The soft magnetic alloy powder is an Fe-based nanocrystalline soft magnetic alloy powder of a crystallized Fe-based amorphous soft magnetic alloy powder, and has a DSC curve with a first peak that is 15% or less of a first peak of the Fe-based amorphous soft magnetic alloy in terms of a maximum value.
    Type: Grant
    Filed: June 24, 2018
    Date of Patent: December 7, 2021
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Toshiyuki Kojima, Masato Maede
  • Publication number: 20210265088
    Abstract: Provided herein is a soft magnetic alloy powder that can exhibit a high saturation flux density and desirable soft magnetic characteristics. A dust core using such a soft magnetic alloy powder is also provided. A soft magnetic alloy powder is used that includes an amorphous phase, and an ?Fe crystalline phase residing in the amorphous phase. The ?Fe crystalline phase has a crystallite volume distribution with a mode of 1 nm or more and 15 nm or less, and with a half width of 3 nm or more and 50 nm or less.
    Type: Application
    Filed: May 13, 2021
    Publication date: August 26, 2021
    Inventors: Masato MAEDE, Toshiyuki KOJIMA
  • Patent number: 11062829
    Abstract: A soft magnetic alloy powder includes a first pulverized powder which has a particle diameter of 20 ?m or more, a value of major diameter/minor diameter of 1.2 or more and 1.8 or less, and a flat plate shape, and a second pulverized powder which has a particle diameter of less than 3 ?m, a value of major diameter/minor diameter of 1.1 or more and 1.6 or less, and a flat plate shape. A production method of a soft magnetic alloy powder, includes first processing of processing a soft magnetic alloy ribbon into a coarse powder, and second processing of pulverizing the coarse powder with a pulverizer.
    Type: Grant
    Filed: January 16, 2019
    Date of Patent: July 13, 2021
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Taishi Fujimoto, Masato Maede
  • Patent number: 11037711
    Abstract: Provided herein is a soft magnetic alloy powder that can exhibit a high saturation flux density and desirable soft magnetic characteristics. A dust core using such a soft magnetic alloy powder is also provided. A soft magnetic alloy powder is used that includes an amorphous phase, and an ?Fe crystalline phase residing in the amorphous phase. The ?Fe crystalline phase has a crystallite volume distribution with a mode of 1 nm or more and 15 nm or less, and with a half width of 3 nm or more and 50 nm or less.
    Type: Grant
    Filed: June 26, 2018
    Date of Patent: June 15, 2021
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Masato Maede, Toshiyuki Kojima
  • Patent number: 10692856
    Abstract: A semiconductor chip including an internal circuit, a plurality of electrode pads and a plurality of I/O cells. The plurality of electrode pads are arranged on a first line, a second line and a third line. Each of the plurality of electrode pads arranged at least on the first and second lines overlaps corresponding one of the plurality of I/O cells in a plan view. The plurality of I/O cells are provided on a peripheral region of the semiconductor chip. Each of the plurality of I/O cells includes a protective circuit, and is connected to corresponding one of the plurality of electrode pads. The protective circuit includes a power source-side protective circuit provided between the corresponding one of the plurality of electrode pads and a power source wiring; and a ground-side protective circuit provided between the corresponding one of the plurality of electrode pads and a ground wiring.
    Type: Grant
    Filed: June 14, 2019
    Date of Patent: June 23, 2020
    Assignee: SOCIONEXT INC.
    Inventors: Koichi Taniguchi, Masato Maede
  • Publication number: 20200143967
    Abstract: A dust core achieving both a high magnetic permeability and a high voltage resistance and a method of manufacturing the same are provided. The dust core is a dust core containing a powder of a soft magnetic composition. The powder of the soft magnetic composition includes at least an ellipsoidal powder having a flatness within a range from 3.0 to 6.0.
    Type: Application
    Filed: October 31, 2019
    Publication date: May 7, 2020
    Inventors: Masato MAEDE, Masaaki TANABE, Taishi FUJIMOTO
  • Publication number: 20190296006
    Abstract: A semiconductor chip including an internal circuit, a plurality of electrode pads and a plurality of I/O cells. The plurality of electrode pads are arranged on a first line, a second line and a third line. Each of the plurality of electrode pads arranged at least on the first and second lines overlaps corresponding one of the plurality of I/O cells in a plan view. The plurality of I/O cells are provided on a peripheral region of the semiconductor chip. Each of the plurality of I/O cells includes a protective circuit, and is connected to corresponding one of the plurality of electrode pads. The protective circuit includes a power source-side protective circuit provided between the corresponding one of the plurality of electrode pads and a power source wiring; and a ground-side protective circuit provided between the corresponding one of the plurality of electrode pads and a ground wiring.
    Type: Application
    Filed: June 14, 2019
    Publication date: September 26, 2019
    Inventors: Koichi TANIGUCHI, Masato MAEDE
  • Publication number: 20190252103
    Abstract: A soft magnetic alloy powder includes a first pulverized powder which has a particle diameter of 20 ?m or more, a value of major diameter/minor diameter of 1.2 or more and 1.8 or less, and a flat plate shape, and a second pulverized powder which has a particle diameter of less than 3 ?m, a value of major diameter/minor diameter of 1.1 or more and 1.6 or less, and a flat plate shape. A production method of a soft magnetic alloy powder, includes first processing of processing a soft magnetic alloy ribbon into a coarse powder, and second processing of pulverizing the coarse powder with a pulverizer.
    Type: Application
    Filed: January 16, 2019
    Publication date: August 15, 2019
    Inventors: TAISHI FUJIMOTO, MASATO MAEDE
  • Patent number: 10366980
    Abstract: A semiconductor chip including an internal circuit, a plurality of electrode pads and a plurality of I/O cells. The plurality of electrode pads are arranged on a first line, a second line and a third line. Each of the plurality of electrode pads arranged at least on the first and second lines overlaps corresponding one of the plurality of I/O cells in a plan view. The plurality of I/O cells are provided on a peripheral region of the semiconductor chip. Each of the plurality of I/O cells includes a protective circuit, and is connected to corresponding one of the plurality of electrode pads. The protective circuit includes a power source-side protective circuit provided between the corresponding one of the plurality of electrode pads and a power source wiring; and a ground-side protective circuit provided between the corresponding one of the plurality of electrode pads and a ground wiring.
    Type: Grant
    Filed: October 2, 2017
    Date of Patent: July 30, 2019
    Assignee: SOCIONEXT INC.
    Inventors: Koichi Taniguchi, Masato Maede
  • Publication number: 20190013124
    Abstract: Provided herein is a soft magnetic alloy powder that can exhibit a high saturation flux density and desirable soft magnetic characteristics. A dust core using such a soft magnetic alloy powder is also provided. A soft magnetic alloy powder is used that includes an amorphous phase, and an ?Fe crystalline phase residing in the amorphous phase. The ?Fe crystalline phase has a crystallite volume distribution with a mode of 1 nm or more and 15 nm or less, and with a half width of 3 nm or more and 50 nm or less.
    Type: Application
    Filed: June 26, 2018
    Publication date: January 10, 2019
    Inventors: MASATO MAEDE, TOSHIYUKI KOJIMA
  • Publication number: 20190013129
    Abstract: A dust core capable of reducing the eddy-current loss of a soft magnetic powder, and having a small loss, particularly in a high-frequency region includes a powder of a soft magnetic composition having a maximum roundness of 0.5 or more, and a mean roundness of 0.2 or more. The powder includes a pulverized powder and a spherical powder. The pulverized powder has a maximum roundness of 0.5 or more, and a mean roundness of 0.2 or more. The spherical powder has a maximum roundness of 0.9 or more, and a mean roundness of 0.5 or more.
    Type: Application
    Filed: July 2, 2018
    Publication date: January 10, 2019
    Inventors: MASATO MAEDE, TOSHIYUKI KOJIMA
  • Publication number: 20190013127
    Abstract: A soft magnetic powder that can exhibit desirable soft magnetic characteristics. A dust core using the soft magnetic powder is also provided. The soft magnetic powder includes: a soft magnetic powder layer of an unoxidized soft magnetic material; a second oxide layer as an oxide with iron or boron residing around the soft magnetic powder layer; and a first oxide layer of an iron oxide residing around the second oxide layer. The first oxide layer and the second oxide layer reside in a region of 20 nm or more and 500 nm or less from a surface of the soft magnetic powder, and are absent in a region of more than 500 nm and 1,600 nm or less from the surface.
    Type: Application
    Filed: June 26, 2018
    Publication date: January 10, 2019
    Inventors: MASATO MAEDE, KAZUTO FUKUDA, TOSHIYUKI KOJIMA, MITSUO SAITOH
  • Publication number: 20190013125
    Abstract: Provided herein is a dust core having high mechanical strength and high magnetic permeability. An alloy powder constituting the dust core is also provided. A soft magnetic powder is used that has a plurality of protrusions of 0.1 ?m or more and 5 ?m or less on an alloy powder surface. A dust core is used that contains at least 80 weight % of the soft magnetic alloy powder. A method for producing a soft magnetic powder is used that includes producing an amorphous soft magnetic alloy ribbon by liquid quenching; and pulverizing the amorphous soft magnetic alloy ribbon into a powder having a thickness of 0.1 ?m or more and 40 ?m or less without heat treatment. The pulverization cleaves the amorphous soft magnetic alloy ribbon, and produces a protrusion on a powder surface.
    Type: Application
    Filed: June 26, 2018
    Publication date: January 10, 2019
    Inventors: TOSHIYUKI KOJIMA, MASATO MAEDE, TAKAO KUROMIYA
  • Publication number: 20190013123
    Abstract: Provided herein is a soft magnetic alloy powder that can exhibit a high saturation flux density and desirable soft magnetic characteristics. A dust core using the soft magnetic alloy powder is also provided. The soft magnetic alloy powder is an Fe-based nanocrystalline soft magnetic alloy powder of a crystallized Fe-based amorphous soft magnetic alloy powder, and has a DSC curve with a first peak that is 15% or less of a first peak of the Fe-based amorphous soft magnetic alloy in terms of a maximum value.
    Type: Application
    Filed: June 24, 2018
    Publication date: January 10, 2019
    Inventors: TOSHIYUKI KOJIMA, MASATO MAEDE
  • Publication number: 20180040608
    Abstract: A semiconductor chip including an internal circuit, a plurality of electrode pads and a plurality of I/O cells. The plurality of electrode pads are arranged on a first line, a second line and a third line. Each of the plurality of electrode pads arranged at least on the first and second lines overlaps corresponding one of the plurality of I/O cells in a plan view. The plurality of I/O cells are provided on a peripheral region of the semiconductor chip. Each of the plurality of I/O cells includes a protective circuit, and is connected to corresponding one of the plurality of electrode pads. The protective circuit includes a power source-side protective circuit provided between the corresponding one of the plurality of electrode pads and a power source wiring; and a ground-side protective circuit provided between the corresponding one of the plurality of electrode pads and a ground wiring.
    Type: Application
    Filed: October 2, 2017
    Publication date: February 8, 2018
    Inventors: Koichi TANIGUCHI, Masato MAEDE
  • Patent number: 9812441
    Abstract: In a semiconductor integrated circuit device, a plurality of electrode pads for external connection are arranged in a zigzag pattern. Some electrode pads of the electrode pads of the plurality of I/O cells which are closer to a side of the semiconductor chip, each have an end portion closer to the side of the semiconductor chip, the end portion being set at the same position as that of an end portion of the corresponding I/O cell. A power source-side protective circuit and a ground-side protective circuit against discharge of static electricity are provided with the power source-side protective circuit being closer to the scribe region. A distance between a center position of one of the electrode pads and the ground-side protective circuit of the corresponding I/O cell and a distance between a center position of the other one electrode pad and the ground-side protective circuit of the corresponding I/O cell are both short and are substantially equal between each I/O cell.
    Type: Grant
    Filed: January 10, 2017
    Date of Patent: November 7, 2017
    Assignee: SOCIONEXT INC.
    Inventors: Koichi Taniguchi, Masato Maede
  • Publication number: 20170117268
    Abstract: In a semiconductor integrated circuit device, a plurality of electrode pads for external connection are arranged in a zigzag pattern. Some electrode pads of the electrode pads of the plurality of I/O cells which are closer to a side of the semiconductor chip, each have an end portion closer to the side of the semiconductor chip, the end portion being set at the same position as that of an end portion of the corresponding I/O cell. A power source-side protective circuit and a ground-side protective circuit against discharge of static electricity are provided with the power source-side protective circuit being closer to the scribe region. A distance between a center position of one of the electrode pads and the ground-side protective circuit of the corresponding I/O cell and a distance between a center position of the other one electrode pad and the ground-side protective circuit of the corresponding I/O cell are both short and are substantially equal between each I/O cell.
    Type: Application
    Filed: January 10, 2017
    Publication date: April 27, 2017
    Inventors: Koichi TANIGUCHI, Masato MAEDE