Abstract: A method of forming a three-dimensional semiconductor device includes forming an alternating stack of insulating layers and spacer material layers over a substrate, forming memory openings formed in the memory array region and monitor openings formed in a monitor region though the alternating stack, forming memory opening fill structures in the memory openings, forming monitor opening fill structures by depositing a monitor opening fill material in the monitor openings, recessing first portions of the alternating stack in a contact region and second portions of the alternating stack in the monitor region, and determining at least one characteristic of the recessed surfaces of the monitor opening fill structures. At least one characteristic of the memory openings or memory opening fill structures may be determined based on the determining at least one characteristic of the recessed surfaces of the monitor opening fill structures.

Abstract: A vertical layer stack including a bit-line-level dielectric layer and an etch stop dielectric layer can be formed over an array region. Bit-line trenches are formed through the vertical layer stack. Bit-line-trench fill structures are formed in the bit-line trenches. Each of the bit-line-trench fill structures includes a stack of a bit line and a capping dielectric strip. At least one via-level dielectric layer can be formed over the vertical layer stack. A bit-line-contact via cavity can be formed through the at least one via-level dielectric layer and one of the capping dielectric strips. A bit-line-contact via structure formed in the bit-line-contact via cavity includes a stepped bottom surface including a top surface of one of the bit lines, a sidewall segment of the etch stop dielectric layer, and a segment of a top surface of the etch stop dielectric layer.

Abstract: A slide mechanism includes: a slider that is movable between a first position and a second position along an edge wall; a shield cover on the slider, the shield cover being located to cover the front of the camera when the slider is in the first position and located to be away from the front of the camera when the slider is in the second position; a movable magnet at the slider; and a fixed magnet at the chassis. The movable magnet and the fixed magnet are disposed to face each other so that when the slider is in the first position and the second position, the movable magnet and the fixed magnet attract to each other, and when the slider is located between the first position and the second position, the movable magnet and the fixed magnet repel each other.

Abstract: A vertical layer stack including a bit-line-level dielectric layer and an etch stop dielectric layer can be formed over an array region. Bit-line trenches are formed through the vertical layer stack. Bit-line-trench fill structures are formed in the bit-line trenches. Each of the bit-line-trench fill structures includes a stack of a bit line and a capping dielectric strip. At least one via-level dielectric layer can be formed over the vertical layer stack. A bit-line-contact via cavity can be formed through the at least one via-level dielectric layer and one of the capping dielectric strips. A bit-line-contact via structure formed in the bit-line-contact via cavity includes a stepped bottom surface including a top surface of one of the bit lines, a sidewall segment of the etch stop dielectric layer, and a segment of a top surface of the etch stop dielectric layer.

Abstract: A flush toilet includes: a bowl; at least one water discharge port to discharge water into the bowl; a water supply path to supply the water from a water supply source to the water discharge port therethrough; and a backflow check structure provided for the water supply path. The backflow check structure checks a backflow of the water running through the water supply path. The backflow check structure has: a water inlet port exposed to the air and directly communicating with the water discharge port; and a water outlet port to channel the water supplied from the water supply source toward the water inlet port. The water inlet port is arranged on a trajectory of the water running out through the water outlet port. The water that has passed through the water inlet port is channeled directly toward the water discharge port.

Abstract: A flush toilet includes: a bowl; at least one water discharge port to discharge water into the bowl; a water supply path to supply the water from a water supply source to the water discharge port therethrough; and a backflow check structure provided for the water supply path. The backflow check structure checks a backflow of the water running through the water supply path. The backflow check structure has: a water inlet port exposed to the air and directly communicating with the water discharge port; and a water outlet port to channel the water supplied from the water supply source toward the water inlet port. The water inlet port is arranged on a trajectory of the water running out through the water outlet port. The water that has passed through the water inlet port is channeled directly toward the water discharge port.

Abstract: A fabrication process is provided for a 3D stacked non-volatile memory device which provides a source contact to a bottom of a memory hole in a stack without exposing a programmable material lining of an interior sidewall of the memory hole and without exposing a channel forming region also lining an interior of the memory hole to an energetic and potentially damaging etch environment. The stack includes alternating control gate layers and dielectric layers on a substrate, and the memory hole is etched through the stack before lining an interior sidewall thereof with the programmable material and then with the channel forming material. The process avoids a need to energetically etch down through the memory hole to open up a source contact hole near the bottom of the channel forming material by instead etching upwardly from beneath the memory hole.

Abstract: A fabrication process is provided for a 3D stacked non-volatile memory device which provides a source contact to a bottom of a memory hole in a stack without exposing a programmable material lining of an interior sidewall of the memory hole and without exposing a channel forming region also lining an interior of the memory hole to an energetic and potentially damaging etch environment. The stack includes alternating control gate layers and dielectric layers on a substrate, and the memory hole is etched through the stack before lining an interior sidewall thereof with the programmable material and then with the channel forming material. The process avoids a need to energetically etch down through the memory hole to open up a source contact hole near the bottom of the channel forming material by instead etching upwardly from beneath the memory hole.

Abstract: A fabrication process is provided for a 3D stacked non-volatile memory device which provides a source contact to a bottom of a memory hole in a stack without exposing a programmable material lining of an interior sidewall of the memory hole and without exposing a channel forming region also lining an interior of the memory hole to an energetic and potentially damaging etch environment. The stack includes alternating control gate layers and dielectric layers on a substrate, and the memory hole is etched through the stack before lining an interior sidewall thereof with the programmable material and then with the channel forming material. The process avoids a need to energetically etch down through the memory hole to open up a source contact hole near the bottom of the channel forming material by instead etching upwardly from beneath the memory hole.

Abstract: A fabrication process is provided for a 3D stacked non-volatile memory device which provides a source contact to a bottom of a memory hole in a stack without exposing a programmable material lining of an interior sidewall of the memory hole and without exposing a channel forming region also lining an interior of the memory hole to an energetic and potentially damaging etch environment. The stack includes alternating control gate layers and dielectric layers on a substrate, and the memory hole is etched through the stack before lining an interior sidewall thereof with the programmable material and then with the channel forming material. The process avoids a need to energetically etch down through the memory hole to open up a source contact hole near the bottom of the channel forming material by instead etching upwardly from beneath the memory hole.

Abstract: A method of minimizing an overetch or damage to a semiconductor surface underneath a memory opening is provided. A first blocking dielectric layer is formed in a memory opening through a stack of an alternating plurality of material layers and insulator layers. A sacrificial liner is formed over the first blocking dielectric layer. An opening is formed through a horizontal portion of the sacrificial liner. A horizontal portion of the first blocking dielectric layer at a bottom of the memory opening can be etched through the opening in the sacrificial liner. A semiconductor surface of the substrate can be physically exposed at a bottom of the memory opening with minimal overetch and/or surface damage. A second blocking dielectric layer can be formed, before or after formation of the sacrificial liner, to provide a multilayer blocking dielectric.

Abstract: A method of minimizing an overetch or damage to a semiconductor surface underneath a memory opening is provided. A first blocking dielectric layer is formed in a memory opening through a stack of an alternating plurality of material layers and insulator layers. A sacrificial liner is formed over the first blocking dielectric layer. An opening is formed through a horizontal portion of the sacrificial liner. A horizontal portion of the first blocking dielectric layer at a bottom of the memory opening can be etched through the opening in the sacrificial liner. A semiconductor surface of the substrate can be physically exposed at a bottom of the memory opening with minimal overetch and/or surface damage. A second blocking dielectric layer can be formed, before or after formation of the sacrificial liner, to provide a multilayer blocking dielectric.

Abstract: According to the present invention, there is provided a thrust bearing that includes a first race ring having a first race surface, a second race ring having a second race surface, a plurality of balls that is placed between the first race surface and the second race surface in a rollable manner, and a holder that holds the balls at equal intervals in a circumferential direction, wherein the holder is made of a synthetic resin, and a pocket interval is 2 to 5% of a diameter of the balls. Damage to the holder is prevented and the thrust bearing has a long life.

Abstract: A conveyor bearing includes an inner ring fitted on and fixed to a shaft, a plurality of rolling elements arranged rollably on a raceway surface of the inner ring, an outer ring disposed of rotatably relative to the inner ring via the rolling elements, and a seal member to seal in a grease between the outer ring and the inner ring. The seal member has a plurality of seal lips and is mounted on at least one location on the bearing.

Abstract: The present invention provides a thrust bearing that is incorporated in a hydraulic continuously variable transmission, and includes: an inner ring that comes into contact with a piston of a piston chamber of a variable capacity pump; an outer ring that is fixed to a swash plate; and a plurality of rolling elements that are held between the inner ring and the outer ring via a cage, wherein: a groove bottom thickness (Ti) of the inner ring is 40% or more of a ball diameter; a groove bottom thickness (Te) of the outer ring is 15% or more of the ball diameter; and a ratio of (Ti/Te) is is more than 1 and less than 3. Thereby, damage of the inner ring is prevented, and thus a thrust bearing for a hydraulic continuously variable transmission of a long service life is provided.

Abstract: According to the present invention, there is provided a thrust bearing that includes a first race ring having a first race surface, a second race ring having a second race surface, a plurality of balls that is placed between the first race surface and the second race surface in a rollable manner, and a holder that holds the balls at equal intervals in a circumferential direction, wherein the holder is made of a synthetic resin, and a pocket interval is 2 to 5% of a diameter of the balls. Damage to the holder is prevented and the thrust bearing has a long life.

Abstract: A gate electrode and an electrode for protective diode are coupled to each other. An insulating film below the electrode for protective diode makes a leak current flow between the electrode for protective diode and an electron transit layer and an electron supply layer when a voltage equal to or more than a given value is applied to the gate electrode. The given value is higher than a voltage by which a HEMT is on-operated and lower than a breakdown voltage of a gate insulating film.

Abstract: A semiconductor device formed in a semiconductor substrate wherein the semiconductor substrate has a trench for isolating elements from each other, the trench has unevenness at the bottom thereof, and an insulator is buried in the trench.

Abstract: A conveyor bearing includes an inner ring fitted on and fixed to a shaft, a plurality of rolling elements arranged rollably on a raceway surface of the inner ring, an outer ring disposed of rotatably relative to the inner ring via the rolling elements, and a seal member to seal in a grease between the outer ring and the inner ring. The seal member has a plurality of seal lips and is mounted on at least one location on the bearing.

Abstract: A semiconductor device formed in a semiconductor substrate wherein the semiconductor substrate has a trench for isolating elements from each other, the trench has unevenness at the bottom thereof, and an insulator is buried in the trench.