Patents by Inventor Masato Momii
Masato Momii has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8004904Abstract: A semiconductor integrated circuit device capable of shortening a chip reset period (time) is provided. The semiconductor integrated circuit device has a nonvolatile memory which performs a reading operation of trimming information after completion of precharge of a data line, and a power-on reset circuit (64) which starts an operation in response to power-on to reset a control circuit of the nonvolatile memory. The device further has a power-on precharge circuit (66) which starts an operation in response to the power-on to perform the precharge operation of the data line. The power-on reset circuit (64) includes a first CR operation circuit (642) which produces a reset release signal indicative of change of a voltage level at a time point when a first predetermined time period (T1) elapses from the power-on.Type: GrantFiled: March 17, 2008Date of Patent: August 23, 2011Assignee: Mitsumi Electric Co., Ltd.Inventor: Masato Momii
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Patent number: 7757143Abstract: A semiconductor device includes one or more test terminals and a test control circuit is disclosed. The test control circuit tests an internal circuit according to the signals received from the one or more test terminals. Afterwards, specification information held in a specification information holding unit is renewed such that one or more inputs of the test control circuit are fixed to a predetermined level.Type: GrantFiled: February 21, 2007Date of Patent: July 13, 2010Assignee: Mitsumi Electric Co., Ltd.Inventor: Masato Momii
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Publication number: 20100085814Abstract: A semiconductor integrated circuit device capable of shortening a chip reset period (time) is provided. The semiconductor integrated circuit device has a nonvolatile memory which performs a reading operation of trimming information after completion of precharge of a data line, and a power-on reset circuit (64) which starts an operation in response to power-on to reset a control circuit of the nonvolatile memory. The device further has a power-on precharge circuit (66) which starts an operation in response to the power-on to perform the precharge operation of the data line. The power-on reset circuit (64) includes a first CR operation circuit (642) which produces a reset release signal indicative of change of a voltage level at a time point when a first predetermined time period (T1) elapses from the power-on.Type: ApplicationFiled: March 17, 2008Publication date: April 8, 2010Inventor: Masato Momii
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Publication number: 20070258310Abstract: There is provided a fuse module that holds trimming information for an internal oscillation circuit module. The fuse module includes information-writing fuse circuits to which trimming information is written depending on whether an information-writing fuse is blown; a reference fuse circuit for determining whether the information-writing fuse has been blown; and a current-to-voltage converter section. Since the reference fuse circuit and the current-to-voltage converter section are shared by the information-writing fuse circuits, the circuit area of the fuse module is greatly reduced.Type: ApplicationFiled: July 6, 2007Publication date: November 8, 2007Inventors: Masato MOMII, Naoki Yada, Masaru Iwabuchi
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Publication number: 20070250735Abstract: A microcontroller formed on a single chip semiconductor includes a central processing unit; an oscillator unit adapted to generate a system clock, and an electrical fuse unit including a control information for trimming a frequency of the oscillator unit. The central processing unit is operable to generate said control information which controls the oscillator unit, using an external clock from outside the microcontroller. The oscillator unit is trimmed by the control information for generating the system clock. Also, the central processing unit is capable of operating by the system clock.Type: ApplicationFiled: June 19, 2007Publication date: October 25, 2007Inventors: Masato MOMII, Naoki Yada, Masaru Iwabuchi
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Publication number: 20070234167Abstract: A disclosed semiconductor device includes one or more test terminals; a test control circuit configured to receive signals as one or more inputs thereof from the one or more test terminals to test an internal circuit by changing a status of the internal circuit according to the signals; a non-volatile storage unit configured to store specification information used for specifying a connection status of the one or more test terminals; a specification information holding unit configured to hold the specification information; a transfer control unit configured to transfer the specification information from the non-volatile storage unit to the specification information holding unit when power is turned on; and a test terminal status determining unit configured to determine the connection status of the one or more test terminals according to the specification information received from the specification information holding unit.Type: ApplicationFiled: February 21, 2007Publication date: October 4, 2007Inventor: Masato MOMII
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Patent number: 7257044Abstract: There is provided a fuse module that holds trimming information for an internal oscillation circuit module. The fuse module includes information-writing fuse circuits to which trimming information is written depending on whether an information-writing fuse is blown; a reference fuse circuit for determining whether the information-writing fuse has been blown; and a current-to-voltage converter section. Since the reference fuse circuit and the current-to-voltage converter section are shared by the information-writing fuse circuits, the circuit area of the fuse module is greatly reduced.Type: GrantFiled: November 3, 2005Date of Patent: August 14, 2007Assignee: Renesas Technology Corp.Inventors: Masato Momii, Naoki Yada, Masaru Iwabuchi
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Patent number: 7250821Abstract: A semiconductor integrated circuit capable of performing internal oscillation with high precision is provided. The semiconductor integrated circuit has a memory circuit, an oscillator circuit for generating an internal clock signal based on control information held in the memory circuit, a logic circuit for generating control information for causing the frequency of the internal clock signal to coincide with the frequency of an external clock signal, and an electric fuse circuit or a blow fuse circuit capable of storing the control information generated in the logic circuit and uses the internal clock signal for the synchronous operation of the internal circuit.Type: GrantFiled: July 26, 2005Date of Patent: July 31, 2007Assignee: Renesas Technology Corp.Inventors: Masato Momii, Naoki Yada, Masaru Iwabuchi
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Publication number: 20060120190Abstract: There is provided a fuse module that holds trimming information for an internal oscillation circuit module. The fuse module includes information-writing fuse circuits to which trimming information is written depending on whether an information-writing fuse is blown; a reference fuse circuit for determining whether the information-writing fuse has been blown; and a current-to-voltage converter section. Since the reference fuse circuit and the current-to-voltage converter section are shared by the information-writing fuse circuits, the circuit area of the fuse module is greatly reduced.Type: ApplicationFiled: November 3, 2005Publication date: June 8, 2006Inventors: Masato Momii, Naoki Yada, Masaru Iwabuchi
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Publication number: 20060017510Abstract: A semiconductor integrated circuit capable of performing internal oscillation with high precision is provided. The semiconductor integrated circuit has a memory circuit, an oscillator circuit for generating an internal clock signal based on control information held in the memory circuit, a logic circuit for generating control information for causing the frequency of the internal clock signal to coincide with the frequency of an external clock signal, and an electric fuse circuit or a blow fuse circuit capable of storing the control information generated in the logic circuit and uses the internal clock signal for the synchronous operation of the internal circuit.Type: ApplicationFiled: July 26, 2005Publication date: January 26, 2006Inventors: Masato Momii, Naoki Yada, Masaru Iwasbuchi
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Patent number: 6820179Abstract: A semiconductor device which has an internal circuit for performing a circuit operation corresponding to a signal inputted or outputted through an input/output interface circuit adapted to a serial bus. The semiconductor device has a non-volatile storage circuit for storing identification data. Internal identification data stored in the non-volatile storage circuit is compared with external identification data included in an input signal supplied through the serial bus by a comparator circuit. A control circuit is responsive to a match detecting signal generated by the comparator circuit to perform a circuit operation corresponding to an input signal subsequently supplied through the serial bus to change the internal identification data stored in the non-volatile storage circuit.Type: GrantFiled: December 4, 2001Date of Patent: November 16, 2004Assignees: Hitachi Hokkai Semiconductor, Ltd., Renesas Technology CorporationInventors: Nobuharu Kobayashi, Masanobu Kawamura, Toru Ishida, Masato Momii, Naoki Fujita
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Publication number: 20020067638Abstract: A semiconductor device which has an internal circuit for performing a circuit operation corresponding to a signal inputted or outputted through an input/output interface circuit adapted to a serial bus. The semiconductor device has a non-volatile storage circuit for storing identification data. Internal identification data stored in the non-volatile storage circuit is compared with external identification data included in an input signal supplied through the serial bus by a comparator circuit. A control circuit is responsive to a match detecting signal generated by the comparator circuit to perform a circuit operation corresponding to an input signal subsequently supplied through the serial bus to change the internal identification data stored in the non-volatile storage circuit.Type: ApplicationFiled: December 4, 2001Publication date: June 6, 2002Inventors: Nobuharu Kobayashi, Masanobu Kawamura, Toru Ishida, Masato Momii, Naoki Fujita