Patents by Inventor Masato Nishizawa
Masato Nishizawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20070159430Abstract: A cholesteric liquid crystal driving device according to the present invention includes a first driving circuit for displaying one part of the image data to be displayed by a cholesteric liquid crystal on a first scanning line by driving the cholesteric liquid crystal on the first scanning line in accordance with first and second cycles; and a second driving circuit for displaying the other part of the image data to be displayed by a cholesteric liquid crystal on a second scanning line by driving the cholesteric liquid crystal on the second scanning line in accordance with a third or fourth cycle.Type: ApplicationFiled: January 20, 2005Publication date: July 12, 2007Inventors: Masato Nishizawa, Kazunori Hiramatsu, Munenori Sawada
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Patent number: 7095451Abstract: To provide an image processing system, projector, information storage medium and black and white extension processing method which can improve the quality of image when at least one of white extension and black extension is performed to video signals, a extension degree setting section is controlled by using a control section to change a degree of extension only when a change-over of scenes occurs, and luminance values of R-signals, G-signals and B-signals are extended toward one of white and black sides with the degree of extension set by the extension degree setting section by using extending sections and a luminance changing section.Type: GrantFiled: March 26, 2003Date of Patent: August 22, 2006Assignee: Seiko Epson CorporationInventors: Takayuki Kitazawa, Masato Nishizawa
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Patent number: 7034861Abstract: A picture composing apparatus designed to combine a plurality of images taken by a plurality of image pickup devices. In the apparatus, a first projecting unit projects the plurality of images taken by the image pickup devices onto a projection section in accordance with an image pickup situation of the image pickup devices to generate a plurality of first projected images, and a second projecting unit projects the plurality of first projected images to a three-dimensional projection model to generate a second projected image.Type: GrantFiled: July 6, 2001Date of Patent: April 25, 2006Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Tsuyoshi Okada, Ryosuke Iida, Masato Nishizawa, Katsumasa Onda, Michio Miwa
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Publication number: 20050140576Abstract: An image display device according to the present invention includes an electrophoretic display member 2 that can display a predetermined image, a liquid crystal display member 3 placed in front of the electrophoretic display member 2 and which can display the predetermined image at a higher speed than the electrophoretic display member 2, and a control device that causes the electrophoretic display member 2 and the liquid crystal display member 3 to display the image corresponding to the same image data at the same position as viewed from front of the device. The control device makes the liquid crystal display member 3 transparent after the predetermined image has been displayed in the electrophoretic display member 2.Type: ApplicationFiled: September 27, 2004Publication date: June 30, 2005Inventors: Munenori Sawada, Kazunori Hiramatsu, Masato Nishizawa
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Publication number: 20050129333Abstract: An image correction apparatus includes: an image input part to which an image including plural character element rows are input; a row detection part for detecting a predetermined character element row from the plural character element rows; a correction amount calculating part for performing calculation of a position correction amount in a column direction with respect to each pixel column on the predetermined character element row; and a position correction part for correcting a position of each pixel column of the image so as to move it in the column direction based on the position correction amount calculated with respect to each pixel column in a predetermined direction.Type: ApplicationFiled: September 30, 2003Publication date: June 16, 2005Inventors: Yoshiyuki Matsuyama, Masato Nishizawa, Chihiro Ueki
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Publication number: 20040161135Abstract: A fingerprint ID device includes input means for receiving a fingerprint image, center detecting means for detecting a center point of a fingerprint from the fingerprint image, area extracting means for extracting a given area, which surrounds the center point, as a center image of the fingerprint, and checking means for checking the center image against fingerprint images registered in advance. This structure allows checking a fingerprint by using the center image which includes a large number of characteristics. Thus even if the finger deviates from a right position, the fingerprint can be identified with accuracy, and at the same time, a memory capacity of the device can be substantially reduced.Type: ApplicationFiled: November 21, 2003Publication date: August 19, 2004Inventors: Misa Sano, Masato Nishizawa, Chihiro Ueki, Tomoyuki Tsurube, Yoshiyuki Matsuyama, Ryosuke Iida, Chie Ide, Sachiko Shiina
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Publication number: 20040032982Abstract: To provide an image processing method, an image processing apparatus, and a projector which determine a scene-change so as to perform an optimal tone conversion, luminance correction, or the like, for each scene of a moving image.Type: ApplicationFiled: June 11, 2003Publication date: February 19, 2004Applicant: Seiko Epson CorporationInventor: Masato Nishizawa
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Publication number: 20030214607Abstract: To provide an image processing system, projector, information storage medium and black and white extension processing method which can improve the quality of image when at least one of white extension and black extension is performed to video signals, a extension degree setting section is controlled by using a control section to change a degree of extension only when a change-over of scenes occurs, and luminance values of R-signals, G-signals and B-signals are extended toward one of white and black sides with the degree of extension set by the extension degree setting section by using extending sections and a luminance changing section.Type: ApplicationFiled: March 26, 2003Publication date: November 20, 2003Applicant: SEIKO EPSON CORPORATIONInventors: Takayuki Kitazawa, Masato Nishizawa
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Patent number: 6442294Abstract: Input data is sampled discretely by a sampling circuit and a cumulative histogram of a plurality of bars is prepared by a cumulative histogram preparing circuit on the basis of the sampled input data. The cumulative histogram is latched by a latch circuit for three vertical scanning periods. Bar values of the cumulative histogram are used by an interpolation circuit to perform contrast conversion of the input data. A gamma circuit applies the gamma characteristic to the data subject to the contrast conversion. An output of the gamma circuit and the input data are inputted to an adder circuit so as to be added and averaged at a predetermined ratio.Type: GrantFiled: July 18, 1996Date of Patent: August 27, 2002Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Masato Nishizawa, Kenji Tabei
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Publication number: 20020018047Abstract: A picture composing apparatus designed to combine a plurality of images taken by a plurality of image pickup devices. In the apparatus, a first projecting unit projects the plurality of images taken by the image pickup devices onto a projection section in accordance with an image pickup situation of the image pickup devices to generate a plurality of first projected images, and a second projecting unit projects the plurality of first projected images to a three-dimensional projection model to generate a second projected image.Type: ApplicationFiled: July 6, 2001Publication date: February 14, 2002Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Tsuyoshi Okada, Ryosuke Iida, Masato Nishizawa, Katsumasa Onda, Michio Miwa
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Patent number: 6121097Abstract: A polysilicon film is deposited in a trench formed in a silicon element substrate. The polysilicon film in the trench and on the silicon element substrate is anisotropically etched, so that the film remains on the side wall of the trench. The polysilicon film on the side wall is oxidized to obtain an insulating film, which buries the trench. At the same time, an oxidized film is formed on the surface of the silicon element substrate to complete a trench-mold separation area.Type: GrantFiled: May 5, 1998Date of Patent: September 19, 2000Assignee: Fuji Electric Co., Ltd.Inventors: Yuichi Urano, Masato Nishizawa, Yoshiyuki Sakai, Naoki Ito, Shinichi Hashimoto
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Patent number: 5866438Abstract: In a comb-like or wedge-like electron emitting device, an emitter or both an emitter and an anode electrode are processed from a single-crystal silicon thin film of an SOI wafer. The single-crystal silicon thin film in portions other than the processed portion is removed so that the silicon oxide layer is dug down further slightly. A gate electrode for applying an electric field in order to draw electrons out of the emitter is provided in the dug-down portion. When the end and side faces of the emitter are formed as (111) faces by anisotropic etching in the condition that the single-crystal silicon thin film is oriented to a (100) face, the emitter has a sharp edge at about 55.degree. with respect to the substrate. In a conical electron emitting device, the gate electrode is constituted by a single-crystal silicon thin film of an SOI wafer so that a pyramid surrounded by the (111) faces is formed on the single-crystal silicon substrate.Type: GrantFiled: April 14, 1998Date of Patent: February 2, 1999Assignees: Fuji Electric Co., Ltd., Director-General, Jiro Hiraishi, Agency of Industrial Science and TechnologyInventors: Junji Itoh, Takahiko Uematsu, Yoichi Ryokai, Masato Nishizawa, Kazuo Matsuzaki
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Patent number: 5854120Abstract: A polysilicon film is deposited in a trench formed in a silicon element substrate. The polysilicon film in the trench and on the silicon element substrate is anisotropically etched, so that the film remains on the side wall of the trench. The polysilicon film on the side wall is oxidized to obtain an insulating film, which buries the trench. At the same time, an oxidized film is formed on the surface of the silicon element substrate to complete a trench-mold separation area.Type: GrantFiled: December 17, 1996Date of Patent: December 29, 1998Assignee: Fuji Electric Co.Inventors: Yuichi Urano, Masato Nishizawa, Yoshiyuki Sakai, Naoki Ito, Shinichi Hashimoto
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Patent number: 5825915Abstract: Based on left and right images that have been taken by image pickup devices, a correlation processing section obtains parallax data as three-dimensional data of objects. At processing start time, a plane estimating section estimates the position of a planar object such as a road or a floor by utilizing the Hough transform based on the parallax data that have been obtained successfully for part of rectangular segments of the images, and interpolates the parallax data by using the position of the planar object. At a time point after the processing start time, a parallax variation detecting section detects an object by comparing current parallax data with the parallax data at the processing start time.Type: GrantFiled: August 30, 1996Date of Patent: October 20, 1998Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Yasuyuki Michimoto, Katsumasa Onda, Masato Nishizawa
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Patent number: 5805216Abstract: A defective pixel correction circuit corrects a defective pixel in a solid imaging device such as a CCD exactly and sufficiently. A boundary detection circuit calculates magnitudes of boundaries from signals of eight peripheral pixels taken in a pixel taking-in circuit and a boundary ordering circuit compares the calculated magnitudes of the boundaries with one another to order the magnitudes of the boundaries. An interpolation circuit produces an interpolation signal in accordance with an interpolation method determined by an interpolation method determining circuit on the basis of the order of the ordered boundaries to correct the defective pixel.Type: GrantFiled: May 31, 1995Date of Patent: September 8, 1998Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Kenji Tabei, Masato Nishizawa
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Patent number: 5793153Abstract: In a comb-like or wedge-like electron emitting device, an emitter or both an emitter and an anode electrode are processed from a single-crystal silicon thin film of an SOI wafer. The single-crystal silicon thin film in portions other than the processed portion is removed so that the silicon oxide layer is dug down further slightly. A gate electrode for applying an electric field in order to draw electrons out of the emitter is provided in the dug-down portion. When the end and side faces of the emitter are formed as (111) faces by anisotropic etching in the condition that the single-crystal silicon thin film is oriented to a (100) face, the emitter has a sharp edge at about 55.degree. with respect to the substrate. In a conical electron emitting device, the gate electrode is constituted by a single-crystal silicon thin film of an SOI wafer so that a pyramid surrounded by the (111) faces is formed on the single-crystal silicon substrate.Type: GrantFiled: August 8, 1995Date of Patent: August 11, 1998Assignees: Fuji Electric Co., Ltd., Director-General, Jiro Hiraishi, Agency of Industrial Science and TechnologyInventors: Junji Itoh, Takahiko Uematsu, Yoichi Ryokai, Masato Nishizawa, Kazuo Matsuzaki
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Patent number: 5607875Abstract: A method for separating a joined substrate type wafer, which wafer is composed of a pair of semiconductor substrates joined through an insulation film, utilizes dielectrics through simple processing steps. Trenches for separating a semiconductor substrate with dielectrics are dug from the surface of the substrate and a dielectrics film is deposited on the surface of the substrate including the trenches. Then poly-crystalline silicon is grown by CVD to a thickness of about 0.5 .mu.m, which is deep enough to fill the trenches. The process time for growing poly-crystalline silicon is shortened, and the processing step for removing the poly-crystalline silicon deposited on the unwanted areas is eliminated by growing the poly-crystalline silicon in the trenches but not on the crystalline surface of semiconductor regions based on the growth rate dependence of the poly-crystalline silicon on the crystallinity of the surface on which the poly-crystalline silicon is grown.Type: GrantFiled: May 31, 1995Date of Patent: March 4, 1997Assignee: Fuji Electric Co., Ltd.Inventors: Masato Nishizawa, Shinichi Hashimoto, Yoshiyuki Sugahara