Patents by Inventor Masato Tajima

Masato Tajima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5793940
    Abstract: A block processing section divides message data into a plurality of blocks, so as to obtain a plurality of data blocks. A plurality of data encryption processing sections are provided in correspondence to the data blocks. The first one of the data encryption processing sections selects one of pre-stored data conversion algorithms in response to an initial selection control signal. Each of the remaining data encryption processing sections selects one of the data conversion algorithms in response to a selection control signal supplied from a preceding data encryption processing section. Each of the data encryption processing sections performs data encryption processing with respect to the corresponding data block on the basis of the selected data conversion algorithm, and generates a selection control signal to be supplied to the succeeding data encryption processing section, on the basis of the data obtained by the data encryption processing.
    Type: Grant
    Filed: April 10, 1996
    Date of Patent: August 11, 1998
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masato Tajima, Taro Shibagaki
  • Patent number: 5740251
    Abstract: A block processing section divides message data into a plurality of blocks, so as to obtain a plurality of data blocks. A plurality of data encryption processing sections are provided in correspondence to the data blocks. The first one of the data encryption processing sections selects one of pre-stored data conversion algorithms in response to an initial selection control signal. Each of the remaining data encryption processing sections selects one of the data conversion algorithms in response to a selection control signal supplied from a preceding data encryption processing section. Each of the data encryption processing sections performs data encryption processing with respect to the corresponding data block on the basis of the selected data conversion algorithm, and generates a selection control signal to be supplied to the succeeding data encryption processing section, on the basis of the data obtained by the data encryption processing.
    Type: Grant
    Filed: April 25, 1995
    Date of Patent: April 14, 1998
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masato Tajima, Taro Shibagaki
  • Patent number: 5517614
    Abstract: A block processing section divides message data into a plurality of blocks, so as to obtain a plurality of data blocks. A plurality of data encryption processing sections are provided in correspondence to the data blocks. The first one of the data encryption processing sections selects one of pre-stored data conversion algorithms in response to an initial selection control signal. Each of the remaining data encryption processing sections selects one of the data conversion algorithms in response to a selection control signal supplied from a preceding data encryption processing section. Each of the data encryption processing sections performs data encryption processing with respect to the corresponding data block on the basis of the selected data conversion algorithm, and generates a selection control signal to be supplied to the succeeding data encryption processing section, on the basis of the data obtained by the data encryption processing.
    Type: Grant
    Filed: May 28, 1993
    Date of Patent: May 14, 1996
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masato Tajima, Taro Shibagaki
  • Patent number: 4905317
    Abstract: A path memory control method in a Viterbi decoder outputs, when a plurality of decoding steps are required to trace back to a final stage of a surviving path, the same number of decoded data as that of the decoding steps required for trace-back, thereby determining the decoded data. During trace-back, state transition information throughout a plurality of times can be combined with each other, and the final stage of the surviving path can be traced back by jumping back a plurality of stages, at a time, by reducing the number of memory access, thereby realizing high-speed decoding.
    Type: Grant
    Filed: December 1, 1987
    Date of Patent: February 27, 1990
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideo Suzuki, Masato Tajima