Patents by Inventor Masato Take

Masato Take has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7102211
    Abstract: The related arts have difficulty in efficiently dissipating the heat generated by a resin-molded semiconductor element, and thus have the problem of thermal stress causing damage to the semiconductor element. To solve the problem, a semiconductor device of the preferred embodiments includes common leads coupled to an island, and a part of the common leads projects out from a resin seal body. The projecting common leads have a coupling portion. When mounting the semiconductor device, the common leads are bridged with brazing material. Thus, the heat generated by an integrated circuit chip mounted on the island is dissipated through the common leads to the outside of the resin seal body. In the preferred embodiments of the invention, a further improvement in heat dissipation characteristics can be accomplished by increasing the surface areas of the common leads.
    Type: Grant
    Filed: June 30, 2004
    Date of Patent: September 5, 2006
    Assignees: Sanyo Electric Co., Ltd., Kanto Sanyo Semiconductors Co., Ltd.
    Inventors: Isao Ochiai, Masato Take
  • Patent number: 6998701
    Abstract: A resin sealing-type semiconductor device comprises a first semiconductor chip 15 with a large amount of heat generation, whose external electrode leading-out bonding pads 16 are wire-bonded to respective outer leads 25A and a second semiconductor chip 17 smaller in the amount of heat generation than the first semiconductor chip, whose external electrode leading-out bonding pads 18 are wire-bonded to respective outer leads 25A, wherein the first semiconductor chip 15 is molded by a high thermal conductive resin 28, and the second semiconductor chip 17 and the first semiconductor chip 15 molded by the high thermal conductive resin are integrally molded by a non-high thermal conductive resin 31. A method includes manufacturing the resin sealing-type semiconductor device.
    Type: Grant
    Filed: March 4, 2004
    Date of Patent: February 14, 2006
    Assignees: Sanyo Electric Co., Ltd., Kanto Sanyo Semiconductors Co., Ltd.
    Inventors: Isao Ochiai, Masato Take
  • Publication number: 20050236706
    Abstract: The related arts have difficulty in efficiently dissipating the heat generated by a resin-molded semiconductor element, and thus have the problem of thermal stress causing damage to the semiconductor element. To solve the problem, a semiconductor device of the preferred embodiments includes common leads coupled to an island, and a part of the common leads projects out from a resin seal body. The projecting common leads have a coupling portion. When mounting the semiconductor device, the common leads are bridged with brazing material. Thus, the heat generated by an integrated circuit chip mounted on the island is dissipated through the common leads to the outside of the resin seal body. In the preferred embodiments of the invention, a further improvement in heat dissipation characteristics can be accomplished by increasing the surface areas of the common leads.
    Type: Application
    Filed: June 30, 2004
    Publication date: October 27, 2005
    Inventors: Isao Ochiai, Masato Take
  • Publication number: 20040201082
    Abstract: In order to produce no effect even when a first semiconductor chip with a large amount of heat generation and a second semiconductor chip with a small amount of heat generation are integrally sealed by a resin, a resin sealing-type semiconductor device comprises a first semiconductor chip 15 with a large amount of heat generation, whose external electrode leading-out bonding pads 16, 16 . . . are wire-bonded to respective outer leads 25A, 25A . . . and a second semiconductor chip 17 smaller in the amount of heat generation than the first semiconductor chip, whose external electrode leading-out bonding pads 18, 18 . . . are wire-bonded to respective outer leads 25A, 25A . . . , wherein the first semiconductor chip 15 is molded by a high thermal conductive resin 28, and the second semiconductor chip 17 and the first semiconductor chip 15 molded by the high thermal conductive resin are integrally molded by a non-high thermal conductive resin 31.
    Type: Application
    Filed: March 4, 2004
    Publication date: October 14, 2004
    Inventors: Isao Ochiai, Masato Take