Abstract: A marker pattern for enhancing resolution of a defect location along an axis in semiconductor defect analysis, and in particular, a marker pattern providing greater resolution in locating bit line defects using thermal laser stimulation methods such as OBIRCH. In an example, the marker pattern may consist of large markers, each having a set of associated small markers. Each of the small markers may be offset along an axis from each other. By identifying the small marker and its associated large marker which align with the defect, the bit line containing the defect may be more easily identified.

Abstract: A marker pattern for enhancing resolution of a defect location along an axis in semiconductor defect analysis, and in particular, a marker pattern providing greater resolution in locating bit line defects using thermal laser stimulation methods such as OBIRCH. In an example, the marker pattern may consist of large markers, each having a set of associated small markers. Each of the small markers may be offset along an axis from each other. By identifying the small marker and its associated large marker which align with the defect, the bit line containing the defect may be more easily identified.

Abstract: Under application of a voltage V3 to a cell plate line PC, a voltage difference appearing on a bit line BL and an inverted bit line /BL in accordance with a polarized state of a memory cell capacitor and a line capacitance is amplified by a sense amplifier, thereby reading data. A read time for this read operation is tR, which is substantially the same as a write time tWL of L data and a write time tWH of H data. Also, the same voltage is used in a write operation and a read operation. Specifically, the operations are conducted with a write energy larger than a read energy. As a result, a read error can be avoided. Furthermore, since an energy not saturating polarization of a ferroelectric film is used in a write operation, there is no need to provide a voltage increasing circuit, and a high operation can be realized.

Abstract: Object: In a semiconductor device with ferroelectric capacitors, variations in the characteristics of the ferroelectric capacitors are reduced, and changes in the characteristic of the ferroelectric capacitor, i.e., characteristic deterioration with passage of time, is suppressed. Measure to Solve: Lower electrodes 111a that extend along a first direction D1 and have a plan configuration having a second direction D2 perpendicular to the first direction as its width direction, a plurality of upper electrodes 112a that are disposed on the lower electrodes 111a opposite to the lower electrodes, and ferroelectric layers that are disposed between the electrodes constitute ferroelectric capacitors 110a, and a plan configuration of the upper electrode 112a is made a shape of the size in the first direction D1 being smaller than the size in the second direction D2.

Abstract: In a semiconductor device with ferroelectric capacitors, variations in the characteristics of the ferroelectric capacitors are reduced, and changes in the characteristic of the ferroelectric capacitor, i.e., characteristic deterioration with passage of time, is suppressed. Lower electrodes 111a that extend along a first direction D1 and have a plan configuration having a second direction D2 perpendicular to the first direction as its width direction, a plurality of upper electrodes 112a that are disposed on the lower electrodes 111a opposite to the lower electrodes, and ferroelectric layers that are disposed between the electrodes constitute ferroelectric capacitors 110a, and a plan configuration of the upper electrode 112a is made a shape of the size in the first direction D1 being smaller than the size in the second direction D2.

Abstract: Under application of a voltage V3 to a cell plate line PC, a voltage difference appearing on a bit line BL and an inverted bit line /BL in accordance with a polarized state of a memory cell capacitor and a line capacitance is amplified by a sense amplifier, thereby reading data. A read time for this read operation is tR, which is substantially the same as a write time tWL of L data and a write time tWH of H data. Also, the same voltage is used in a write operation and a read operation. Specifically, the operations are conducted with a write energy larger than a read energy. As a result, a read error can be avoided. Furthermore, since an energy not saturating polarization of a ferroelectric film is used in a write operation, there is no need to provide a voltage increasing circuit, and a high operation can be realized.

Abstract: Described herein is an apparatus for evaluating the polarization characteristic of a ferroelectric capacitor. The apparatus includes a ferroelectric capacitor, a first pulse generator, a second pulse generator, a reference capacitor of a known capacitance value, and switch means. Those electronic circuit elements and components are all fabricated into a semiconductor substrate. In the apparatus, the first and second electrodes of the ferroelectric capacitor are connected to the output terminals of the first and second pulse generators. A second electrode of the ferroelectric capacitor is connected to an output terminal of the second pulse generator. The second electrode of the ferroelectric capacitor is connected to a first electrode of the reference capacitor through the switch means.