Patents by Inventor Masatomo Higuchi

Masatomo Higuchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8072538
    Abstract: A camera module 100 of the present invention is arranged such that a lens barrel 32 is provided with an internal screw thread 32a on its internal side, and that a holding section 41, which is a portion of a lens holder 4, the portion holding a lens unit 3, is provided with an external screw thread 41a on its external side, the external screw thread 41a being engaged with the internal screw thread 32a. As a result, it is possible to provide the camera module 100 capable of preventing contamination by dirt into a light path and thereby reducing imaging defects.
    Type: Grant
    Filed: February 12, 2009
    Date of Patent: December 6, 2011
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Masatomo Higuchi
  • Publication number: 20090219433
    Abstract: A camera module 100 of the present invention is arranged such that a lens barrel 32 is provided with an internal screw thread 32a on its internal side, and that a holding section 41, which is a portion of a lens holder 4, the portion holding a lens unit 3, is provided with an external screw thread 41a on its external side, the external screw thread 41a being engaged with the internal screw thread 32a. As a result, it is possible to provide the camera module 100 capable of preventing contamination by dirt into a light path and thereby reducing imaging defects.
    Type: Application
    Filed: February 12, 2009
    Publication date: September 3, 2009
    Applicant: Sharp Kabushiki Kaisha
    Inventor: Masatomo Higuchi
  • Patent number: 6008093
    Abstract: A semiconductor device fabrication method is provided which comprises the steps of: (i) forming a plurality of high concentration diffusion layers of a second conductivity in a semiconductor substrate; (ii) forming a plurality of first gate electrodes extending perpendicularly to the high concentration diffusion layers of the second conductivity on the semiconductor substrate with a first gate insulating film interposed therebetween; (iii) implanting ions of a first conductivity into surface portions of the semiconductor substrate for device isolation by using the first gate electrodes as a mask; (iv) forming side wall spacers on side walls of the first gate electrodes; (v-i) implanting ions of the second conductivity into surface portions of the semiconductor substrate for formation of channel regions by using the first gate electrodes and the side wall spacers as a mask; (vi-i) forming a plurality of second gate electrodes on the ion-implanted channel regions between the first gate electrodes; and (vii) imp
    Type: Grant
    Filed: January 5, 1998
    Date of Patent: December 28, 1999
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hitoshi Aoki, Masatomo Higuchi, Keiji Terayama