Abstract: If the period of a horizontal synchronizing signal component output from a synchronizing separator circuit differs from a predetermined horizontal trace period, a decision-making circuit determines that a channel with no signal has been received, making high the frequency of a clock for generation of a write address. If the period of the horizontal synchronizing signal component equals the predetermined horizontal trace period, the decision-making circuit makes low the frequency of a clock for generation of a write address. Accordingly, in a multiple-channel picture display mode, in the case of the reception of a channel with no signal, writing for one horizontal trace period is completed in a shorter time than writing in the case of reception of a channel with a signal. The received signal of each channel is correctly written into a picture memory in each horizontal trace period irrespective of variations in the dispersion of the period of the horizontal synchronizing signal component.