Patents by Inventor Masatomo Takeichi

Masatomo Takeichi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6815270
    Abstract: The present invention discloses a thin film transistor and a process for forming thereof by a high anisotropy etching process. A thin film transistor according to the present invention comprises a transistor element including a gate electrode, a gate insulating layer, a semiconductor layer, and source and drain electrodes; a passivation layer being deposited on the layers and having first openings for contact holes; and an interlayer insulator extending along with the passivation layer and having second openings for the contact holes, the first openings and the second openings being aligned each other over the substrate, wherein an electrical conductive layer is deposited on an inner wall of the contact hole and the inner wall is formed by the first and second openings tapered smoothly and continuously through an anisotropic etching process.
    Type: Grant
    Filed: May 15, 2003
    Date of Patent: November 9, 2004
    Assignee: International Business Machines Corporation
    Inventors: Takatoshi Tsujimura, Masatomo Takeichi, Kai R. Schleupen, Evan G. Colgan
  • Patent number: 6798466
    Abstract: A liquid crystal device (and method for forming the LCD) includes a first transparent substrate having a first surface and a second surface, and a second transparent substrate having a first surface and a second surface. The first transparent substrate and the second transparent substrate are arranged such that the first surface of the first transparent substrate faces the first surface of the second transparent substrate, and a liquid crystal material is enclosed between the first surface of the first transparent substrate and the first surface of the second transparent substrate. A pixel array, in which a plurality of pixel regions are arranged in row and column directions and data signals are applied to the pixel regions through data lines, is formed on the first surface of the first transparent substrate and the first surface of the second transparent substrate.
    Type: Grant
    Filed: July 2, 2003
    Date of Patent: September 28, 2004
    Assignee: International Business Machines Corporation
    Inventors: Masatomo Takeichi, Hiroaki Kitahara
  • Publication number: 20040095541
    Abstract: A liquid crystal device (and method for forming the LCD) includes a first transparent substrate having a first surface and a second surface, and a second transparent substrate having a first surface and a second surface. The first transparent substrate and the second transparent substrate are arranged such that the first surface of the first transparent substrate faces the first surface of the second transparent substrate, and a liquid crystal material is enclosed between the first surface of the first transparent substrate and the first surface of the second transparent substrate. A pixel array, in which a plurality of pixel regions are arranged in row and column directions and data signals are applied to the pixel regions through data lines, is formed on the first surface of the first transparent substrate and the first surface of the second transparent substrate.
    Type: Application
    Filed: July 2, 2003
    Publication date: May 20, 2004
    Applicant: International Business Machines Corporation
    Inventors: Masatomo Takeichi, Hiroaki Kitahara
  • Patent number: 6693297
    Abstract: The present invention discloses a thin film transistor and a process for forming thereof by a high anisotropy etching process. A thin film transistor according to the present invention comprises a transistor element including a gate electrode, a gate insulating layer, a semiconductor layer, and source and drain electrodes; a passivation layer being deposited on the layers and having first openings for contact holes; and an interlayer insulator extending along with the passivation layer and having second openings for the contact holes, the first openings and the second openings being aligned each other over the substrate, wherein an electrical conductive layer is deposited on an inner wall of the contact hole and the inner wall is formed by the first and second openings tapered smoothly and continuously through an anisotropic etching process.
    Type: Grant
    Filed: June 18, 2001
    Date of Patent: February 17, 2004
    Assignee: International Business Machines Corporation
    Inventors: Takatoshi Tsujimura, Masatomo Takeichi, Kai R. Schleupen, Evan G. Colgan
  • Patent number: 6654075
    Abstract: A liquid crystal device (and method for forming the LCD) includes a first transparent substrate having a first surface and a second surface, and a second transparent substrate having a first surface and a second surface. The first transparent substrate and the second transparent substrate are arranged such that the first surface of the first transparent substrate faces the first surface of the second transparent substrate, and a liquid crystal material is enclosed between the first surface of the first transparent substrate and the first surface of the second transparent substrate. A pixel array, in which a plurality of pixel regions are arranged in row and column directions and data signals are applied to the pixel regions through data lines, is formed on the first surface of the first transparent substrate and the first surface of the second transparent substrate.
    Type: Grant
    Filed: March 2, 2000
    Date of Patent: November 25, 2003
    Assignee: International Business Machines Corporation
    Inventors: Masatomo Takeichi, Hiroaki Kitahara
  • Publication number: 20030197180
    Abstract: The present invention discloses a thin film transistor and a process for forming thereof by a high anisotropy etching process. A thin film transistor according to the present invention comprises a transistor element including a gate electrode, a gate insulating layer, a semiconductor layer, and source and drain electrodes; a passivation layer being deposited on the layers and having first openings for contact holes; and an interlayer insulator extending along with the passivation layer and having second openings for the contact holes, the first openings and the second openings being aligned each other over the substrate, wherein an electrical conductive layer is deposited on an inner wall of the contact hole and the inner wall is formed by the first and second openings tapered smoothly and continuously through an anisotropic etching process.
    Type: Application
    Filed: May 15, 2003
    Publication date: October 23, 2003
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Takatoshi Tsujimura, Masatomo Takeichi, Kai R. Schleupen, Evan G. Colgan
  • Publication number: 20020190253
    Abstract: The present invention discloses a thin film transistor and a process for forming thereof by a high anisotropy etching process. A thin film transistor according to the present invention comprises a transistor element including a gate electrode, a gate insulating layer, a semiconductor layer, and source and drain electrodes; a passivation layer being deposited on the layers and having first openings for contact holes; and an interlayer insulator extending along with the passivation layer and having second openings for the contact holes, the first openings and the second openings being aligned each other over the substrate, wherein an electrical conductive layer is deposited on an inner wall of the contact hole and the inner wall is formed by the first and second openings tapered smoothly and continuously through an anisotropic etching process.
    Type: Application
    Filed: June 18, 2001
    Publication date: December 19, 2002
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Takatoshi Tsujimura, Masatomo Takeichi, Kai R. Schleupen, Evan G. Colgan
  • Patent number: 6258723
    Abstract: A method for etching a hydrogenated amorphous silicon layer and a metal layer formed thereon in a dry etching tool, is described incorporating the steps of selectively etching the metal layer on the hydrogenated amorphous silicon layer and etching the hydrogenated amorphous silicon layer. The invention overcomes the problem of performing sequential dry etching of a metal layer and a hydrogenated amorphous silicon underlayer in a single etching tool.
    Type: Grant
    Filed: March 18, 1999
    Date of Patent: July 10, 2001
    Assignee: International Business Machines Corporation
    Inventors: Masatomo Takeichi, Hiroaki Kitahara