Patents by Inventor Masatoshi Ichikawa

Masatoshi Ichikawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7206832
    Abstract: The Computer System consists of components including more than one Computer and Storage Subsystem to which more than one Computer are connected. The Storage Subsystem is equipped with more than one Storage Unit, Management Table registering information to manage Storage Units accessible by each of the Computers and Controller to control accesses by more than one Computer to more than one Storage Unit. The controller controls the accesses according to the information set in the Management Table when the Storage Unit is accessed by the Computer.
    Type: Grant
    Filed: July 14, 2004
    Date of Patent: April 17, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Naoto Matsunami, Akira Yamamoto, Hideki Kamimaki, Masatoshi Ichikawa, Jun Matsumoto, Yasuyuki Mimatsu, Ikuya Yagisawa, Masayuki Yamamoto
  • Publication number: 20070083635
    Abstract: The Computer System consists of components including more than one Computer and Storage Subsystem to which more than one Computer are connected. The Storage Subsystem is equipped with more than one Storage Unit, Management Table registering information to manage Storage Units accessible by each of the Computers and Controller to control accesses by more than one Computer to more than one Storage Unit. The controller controls the accesses according to the information set in the Management Table when the Storage Unit is accessed by the Computer.
    Type: Application
    Filed: December 12, 2006
    Publication date: April 12, 2007
    Inventors: Naoto Matsunami, Akira Yamamoto, Hideki Kamimaki, Masatoshi Ichikawa, Jun Matsumoto, Yasuyuki Mimatsu, Ikuya Yagisawa, Masayuki Yamamoto, Yasunori Kaneda
  • Publication number: 20060271809
    Abstract: Embodiments of the invention provide an error recovery scheme that allows a data read/write error in a data storage device to be processed within a short time, and a data storage device that attempts error recovery using the error recovery scheme. In one embodiment, a data storage device conducts an error recovery process for a data access error in accordance with an error recovery procedure having multiple error recovery steps; the data storage device including a head that accesses a data region of a user data storage medium, and a controller that controls the error recovery process by using not only address information of the sector where the access error to the data region has occurred, but also an error recovery log which has address information of the data region and past error recovery information associated with the latter address information.
    Type: Application
    Filed: May 31, 2006
    Publication date: November 30, 2006
    Applicant: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Masatoshi Ichikawa, Akira Kojima, Yoshinori Makita, Kazunari Kose
  • Patent number: 7082462
    Abstract: The Computer System consists of components including more than one Computer and Storage Subsystem to which more than one Computer are connected. The Storage Subsystem is equipped with more than one Storage Unit, Management Table registering information to manage Storage Units accessible by each of the Computers and Controller to control accesses by more than one Computer to more than one Storage Unit. The controller controls the accesses according to the information set in the Management Table when the Storage Unit is accessed by the Computer.
    Type: Grant
    Filed: March 10, 2000
    Date of Patent: July 25, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Naoto Matsunami, Akira Yamamoto, Hideki Kamimaki, Masatoshi Ichikawa, Jun Matsumoto, Yasuyuki Mimatsu, Ikuya Yagisawa, Masayuki Yamamoto, Yasunori Kaneda
  • Publication number: 20050021727
    Abstract: The Computer System consists of components including more than one Computer and Storage Subsystem to which more than one Computer are connected. The Storage Subsystem is equipped with more than one Storage Unit, Management Table registering information to manage Storage Units accessible by each of the Computers and Controller to control accesses by more than one Computer to more than one Storage Unit. The controller controls the accesses according to the information set in the Management Table when the Storage Unit is accessed by the Computer.
    Type: Application
    Filed: July 14, 2004
    Publication date: January 27, 2005
    Inventors: Naoto Matsunami, Akira Yamamoto, Hideki Kamimaki, Masatoshi Ichikawa, Jun Matsumoto, Yasuyuki Mimatsu, Ikuya Yagisawa, Masayuki Yamamoto
  • Patent number: 6484229
    Abstract: A disk storage apparatus includes a logical unit number correspondence memory for storing the correspondence and the logical unit number designated by a host computer and the logical unit number of the disk storage apparatus, a logical unit number conversion program for converting the logical unit number designated by the host computer to the logical unit number of the disk storage apparatus, and a logical unit correspondence setting program for storing the correspondence of the logical unit number designated by the host computer to the logical unit number of the disk storage in the logical unit number correspondence memory thereby, a plurality of host computers sharing at least one disk storage apparatus.
    Type: Grant
    Filed: March 3, 2000
    Date of Patent: November 19, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Masatoshi Ichikawa, Kiyoshi Honda, Naoto Matsunami, Hideki Kamimaki, Osamu Kunisaki
  • Patent number: 6462466
    Abstract: In a color cathode ray tube, inner lead pin segments which extend inside the neck of a funnel constituting an vacuum envelope, outer lead pin segments which are led out of the neck and interconnecting wires which respectively connect both lead pin segments together are provided in a stem for sealing the end portion of the neck. The inner lead pin segments are arranged along a first circumference and are supported by respective projections protruding from the stem. The outer lead pin segments are arranged along a second circumference having a larger diameter than that of the first circumference. The inner lead pin segments are connected to the respective outer lead pin segments by the respective interconnecting wires which are bent in the stem and the respective projections.
    Type: Grant
    Filed: October 12, 1999
    Date of Patent: October 8, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shigeru Sugawara, Hiroyuki Koba, Fumitaka Hoshino, Hidenori Takata, Masatoshi Ichikawa
  • Patent number: 6113461
    Abstract: In order to eliminate a delay in a driving system and a control system during sequential operation of various component parts, to thereby realize a high speed and easy multi-axis control, a work delivery and removing device (7), a grindstone retracting device (14) and a gauge retracting device (19) are driven by respective compact electric motors (15, 13, 18) through associated reduction gear units. A reference pulse generator (34) for sequencers for generating reference pulses is provided, which reference pulses are distributed by a pulse distributor (35) to various position change curve setting units (36A, 36B, 36C). The position change curve setting units (36A, 36B, 36C) are a so-called electronic cam and output in response to receipt of the corresponding reference pulses respective position commands representative of predetermined position change curves (a, b, c). Servo-controllers (37A, 37B, 37C) are used for controlling the electric motors (15, 13, 18) in response to these outputs.
    Type: Grant
    Filed: September 24, 1997
    Date of Patent: September 5, 2000
    Assignee: NTN Corporation
    Inventors: Makoto Onoda, Masatoshi Ichikawa, Takehiro Ohashi, Shinji Kuwahara, Takahiro Nakano, Yuzo Hotta
  • Patent number: 6094728
    Abstract: A disk array controller or a disk array system includes a disk array control unit having an MPU 8 and a user data transfer control unit having host interfaces 3 and 4 with a host computer 17, a memory 5 for temporarily storing data, a redundant data generator 7 for generating redundant data, multi-channel disk device interfaces 16a.about.16e and 12a.about.12e and a data transfer control circuit (DMAC) 6 for controlling the data transfer between the host interface, the memory, the redundant data generator and the disk device interface. Internal buses are of at least three-bus structure including a control bus (for MPU) 15, a host data bus 13 and a drive data bus 14.
    Type: Grant
    Filed: May 5, 1997
    Date of Patent: July 25, 2000
    Assignee: Hitachi, Ltd.
    Inventors: Masatoshi Ichikawa, Soichi Isono, Kiyoshi Honda, Jun Matsumoto
  • Patent number: 4997539
    Abstract: A method for producing a magnetic recording medium, which comprises forming, by sputtering, a thin undercoating layer and a thin cobalt alloy magnetic layer sequentially on a substrate, wherein an intermediate electrode is provided in the vicinity of the target to enclose at least 1/2 of the circumference of the sputter erosion end of the target, and at least one of the undercoating layer and the cobalt alloy magnetic layer is formed under such condition that a positive potential relative to the substrate and the grounded portion of the main body of the layer-forming apparatus, is applied to the intermediate electrode.
    Type: Grant
    Filed: July 12, 1989
    Date of Patent: March 5, 1991
    Assignee: Mitsubishi Kasei Corporation
    Inventors: Kazunaga Komizo, Masatoshi Ichikawa, Takeshi Sakuma, Fumiaki Yokoyama, Yukio Yamaguchi