Patents by Inventor Masatoshi Miyahara

Masatoshi Miyahara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10512970
    Abstract: A primary object of the present invention is to provide a technique of avoiding occurrence of surface defects caused by an electromagnetic brake while checking internal defects with this electromagnetic brake, so that cleanliness of a cast steel can be improved compared with prior arts, and the present invention provides a method for continuously casting steel, the method comprising supplying molten steel into a funnel mold while applying an electromagnetic brake to an outlet flow discharged from an outlet port of an immersion nozzle, wherein magnetic flux density (B) of the electromagnetic brake is within a range of the following (Formula 1): B min ? B ? B max , ? B min = 800 · ( D max D 0 ) 3 · ( H SEN H 0 ) ? ( v · sin ? ? ? ) ? , ? and ? ? B max = 3000 · ( D max D 0 ) 3 · ( H SEN H 0 ) ( v · sin ? ? ? ) 2 .
    Type: Grant
    Filed: January 24, 2019
    Date of Patent: December 24, 2019
    Assignee: NIPPON STEEL CORPORATION
    Inventors: Masahito Hanao, Hiroaki Uchiyama, Kohei Fujimoto, Masatoshi Miyahara
  • Publication number: 20190151937
    Abstract: A primary object of the present invention is to provide a technique of avoiding occurrence of surface defects caused by an electromagnetic brake while checking internal defects with this electromagnetic brake, so that cleanliness of a cast steel can be improved compared with prior arts, and the present invention provides a method for continuously casting steel, the method comprising supplying molten steel into a funnel mold while applying an electromagnetic brake to an outlet flow discharged from an outlet port of an immersion nozzle, wherein magnetic flux density (B) of the electromagnetic brake is within a range of the following (Formula 1): B min ? B ? B max , ? B min = 800 · ( D max D 0 ) 3 · ( H SEN H 0 ) ? ( v · sin ? ? ? ) ? , ? and ? ? B max = 3000 · ( D max D 0 ) 3 · ( H SEN H 0 ) ( v · sin ? ? ? ) 2 .
    Type: Application
    Filed: January 24, 2019
    Publication date: May 23, 2019
    Inventors: Masahito HANAO, Hiroaki UCHIYAMA, Kohei FUJIMOTO, Masatoshi MIYAHARA
  • Patent number: 10259037
    Abstract: A primary object of the present invention is to provide a technique of avoiding occurrence of surface defects caused by an electromagnetic brake while checking internal defects with this electromagnetic brake, so that cleanliness of a cast steel can be improved compared with prior arts, and the present invention provides a method for continuously casting steel, the method comprising supplying molten steel into a mold while applying an electromagnetic brake to an outlet flow discharged from an outlet port of an immersion nozzle, wherein magnetic flux density (B) of the electromagnetic brake is within a range of the following (Formula 1): B min ? B ? B max , ? B min = 800 · ( D max D 0 ) 3 · ( H SEN H 0 ) ( v · sin ? ? ? ) , and ? ? B max = 3000 · ( D max D 0 ) 3 · ( H SEN H 0 ) ( v · sin ? ? ? ) 2 .
    Type: Grant
    Filed: March 31, 2016
    Date of Patent: April 16, 2019
    Assignee: NIPPON STEEL & SUMITOMO METAL CORPORATION
    Inventors: Masahito Hanao, Hiroaki Uchiyama, Kohei Fujimoto, Masatoshi Miyahara
  • Publication number: 20180009026
    Abstract: A primary object of the present invention is to provide a technique of avoiding occurrence of surface defects caused by an electromagnetic brake while checking internal defects with this electromagnetic brake, so that cleanliness of a cast steel can be improved compared with prior arts, and the present invention provides a method for continuously casting steel, the method comprising supplying molten steel into a mold while applying an electromagnetic brake to an outlet flow discharged from an outlet port of an immersion nozzle, wherein magnetic flux density (B) of the electromagnetic brake is within a range of the following (Formula 1): B min ? B ? B max , ? B min = 800 · ( D max D 0 ) 3 · ( H SEN H 0 ) ( v · sin ? ? ? ) , and ? ? B max = 3000 · ( D max D 0 ) 3 · ( H SEN H 0 ) ( v · sin ? ? ? ) 2 .
    Type: Application
    Filed: March 31, 2016
    Publication date: January 11, 2018
    Inventors: Masahito HANAO, Hiroaki UCHIYAMA, Kohei FUJIMOTO, Masatoshi MIYAHARA
  • Patent number: 8552533
    Abstract: A method for manufacturing the compound semiconductor substrate having a reduced dislocation density at an interface between a Si substrate. Contaminants, such as organic matter and metal, on a surface of a Si substrate are removed whereby a flat oxide film is formed. The oxide film on the surface is removed by using an aqueous hydrogen fluoride solution, whereby hydrogen termination treatment is performed. Immediately after being subjected to the hydrogen termination treatment the temperature of the Si substrate is raised in a vacuum apparatus. If the substrate temperature is raised without any operation, the termination hydrogen is released. Before the hydrogen is released, pre-irradiation with As is performed. Thus, an interface between the Si substrate and the compound semiconductor layer is prepared. Several minutes later, irradiation with Ga and As is performed. Thereby, the compound semiconductor is formed.
    Type: Grant
    Filed: September 12, 2008
    Date of Patent: October 8, 2013
    Assignee: Asahi Kasei EMD Corporation
    Inventors: Yoshihiko Shibata, Masatoshi Miyahara, Takashi Ikeda, Yoshihisa Kunimi
  • Patent number: 8461026
    Abstract: The present invention relates to a compound semiconductor lamination that enables an InSb film to be formed on an Si substrate and enables development of applications to magnetic sensors, such as Hall elements, magneto-resistance elements, etc., optical devices, such as infrared sensors, etc., and electronic devices, such as transistors, etc., to be provided industrially, and a method for manufacturing the compound semiconductor lamination. An active layer, which is a compound semiconductor that does not contain As, is directly formed on an Si substrate. As is present at an interface of the active layer and a single crystal layer of the Si substrate. The compound semiconductor contains at least nitrogen. The compound semiconductor is a single crystal thin film. The Si substrate is a bulk single crystal substrate or a thin film substrate with an uppermost layer being Si.
    Type: Grant
    Filed: March 21, 2008
    Date of Patent: June 11, 2013
    Assignee: Asahi Kasei EMD Corporation
    Inventors: Yoshihiko Shibata, Masatoshi Miyahara
  • Publication number: 20100200956
    Abstract: A method for manufacturing the compound semiconductor substrate having a reduced dislocation density at an interface between a Si substrate. Contaminants, such as organic matter and metal, on a surface of a Si substrate are removed whereby a flat oxide film is formed. The oxide film on the surface is removed by using an aqueous hydrogen fluoride solution, whereby hydrogen termination treatment is performed. Immediately after being subjected to the hydrogen termination treatment the temperature of the Si substrate is raised in a vacuum apparatus. If the substrate temperature is raised without any operation, the termination hydrogen is released. Before the hydrogen is released, pre-irradiation with As is performed. Thus, an interface between the Si substrate and the compound semiconductor layer is prepared. Several minutes later, irradiation with Ga and As is performed. Thereby, the compound semiconductor is formed.
    Type: Application
    Filed: September 12, 2008
    Publication date: August 12, 2010
    Inventors: Yoshihiko Shibata, Masatoshi Miyahara, Takashi Ikeda, Yoshihisa Kunimi
  • Publication number: 20100090249
    Abstract: The present invention relates to a compound semiconductor lamination that enables an InSb film to be formed on an Si substrate and enables development of applications to magnetic sensors, such as Hall elements, magneto-resistance elements, etc., optical devices, such as infrared sensors, etc., and electronic devices, such as transistors, etc., to be provided industrially, and a method for manufacturing the compound semiconductor lamination. An active layer, which is a compound semiconductor that does not contain As, is directly formed on an Si substrate. As is present at an interface of the active layer and a single crystal layer of the Si substrate. The compound semiconductor contains at least nitrogen. The compound semiconductor is a single crystal thin film. The Si substrate is a bulk single crystal substrate or a thin film substrate with an uppermost layer being Si.
    Type: Application
    Filed: March 21, 2008
    Publication date: April 15, 2010
    Applicant: ASAHI KASEI EMD CORPORATION
    Inventors: Yoshihiko Shibata, Masatoshi Miyahara