Patents by Inventor Masatoshi Shiraishi

Masatoshi Shiraishi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11781215
    Abstract: A substrate processing method includes preparing a substrate, forming a plating inhibiting film and forming a plating film. In the preparing of the substrate, the substrate W which has a recess 101 formed on a front surface thereof and a seed layer 102 formed on the front surface and an inner surface of the recess is prepared. In the forming of the plating inhibiting film, the plating inhibiting film 103C is formed on an upper portion of the recess. In the forming of the plating film, the plating film 104 is formed in the recess by bringing the substrate into contact with a plating liquid after the forming of the plating inhibiting film, to thereby fill the recess with the plating film.
    Type: Grant
    Filed: June 8, 2020
    Date of Patent: October 10, 2023
    Assignee: TOKYO ELECTRON LIMITED
    Inventor: Masatoshi Shiraishi
  • Publication number: 20230096305
    Abstract: A plating apparatus 1 includes a substrate holder 10, a first electrode, a second electrode and a voltage applying unit 30. The substrate holder 10 is configured to hold a substrate. The first electrode is electrically connected to the substrate. The second electrode is configured to scan with respect to a front surface of the substrate. The voltage applying unit 30 is configured to apply a voltage between the first electrode and the second electrode. A first discharge opening 23 configured to discharge a plating liquid L1 and a second discharge opening 24 configured to discharge a cleaning liquid L2 are formed in a bottom surface 22a of the second electrode.
    Type: Application
    Filed: February 17, 2021
    Publication date: March 30, 2023
    Inventors: Masato Hamada, Masami Akimoto, Masatoshi Shiraishi, Kazuyuki Goto, Satoshi Kaneko, Kazuki Motomatsu
  • Publication number: 20230042744
    Abstract: A plating method includes holding a substrate, supplying a plating liquid L1, supplying a conductive liquid L2 and applying a voltage. In the holding of the substrate, the substrate is held. In the supplying of the plating liquid L1, the plating liquid L1 is supplied onto the held substrate. In the supplying of the conductive liquid L2, the conductive liquid L2, which is different from the plating liquid L1 supplied on the substrate, is supplied onto the plating liquid L1. In the applying of the voltage, the voltage is applied between the substrate and the conductive liquid L2.
    Type: Application
    Filed: February 1, 2021
    Publication date: February 9, 2023
    Inventors: Masato Hamada, Masami Akimoto, Masatoshi Shiraishi, Satoshi Kaneko, Kazuki Motomatsu, Kazuyuki Goto
  • Publication number: 20220275502
    Abstract: A substrate processing method includes preparing a substrate, forming a plating inhibiting film and forming a plating film. In the preparing of the substrate, the substrate W which has a recess 101 formed on a front surface thereof and a seed layer 102 formed on the front surface and an inner surface of the recess is prepared. In the forming of the plating inhibiting film, the plating inhibiting film 103C is formed on an upper portion of the recess. In the forming of the plating film, the plating film 104 is formed in the recess by bringing the substrate into contact with a plating liquid after the forming of the plating inhibiting film, to thereby fill the recess with the plating film.
    Type: Application
    Filed: June 8, 2020
    Publication date: September 1, 2022
    Inventor: Masatoshi Shiraishi
  • Patent number: 10008419
    Abstract: A superposed wafer is separated to a processing target wafer and a supporting wafer while being heated. Then, an adhesive on a joint surface of the processing target wafer is removed by supplying an organic solvent onto the joint surface of the processing target wafer. Then, an oxide film formed on the predetermined pattern on the joint surface of the processing target wafer is removed by supplying acetic acid to the joint surface of the processing target wafer. Then, the joint surface of the processing target wafer is inspected. Then, based on an inspection result, the adhesive on the joint surface of the processing target wafer is removed and the oxide film formed on the predetermined pattern on the joint surface of the processing target wafer is removed.
    Type: Grant
    Filed: August 22, 2012
    Date of Patent: June 26, 2018
    Assignees: Tokyo Electron Limited, INTEL CORPORATION
    Inventors: Shinji Okada, Masatoshi Shiraishi, Masatoshi Deguchi, Xavier Francois Brun, Charles Wayne Singleton, Jr., Kabirkumar Mirpuri
  • Patent number: 9484236
    Abstract: This joining method of joining a target substrate and a support substrate includes: an adhesive coating operation that includes coating the target substrate or the support substrate with an adhesive; an adhesive removing operation that includes supplying a solvent for removing the adhesive onto an outer peripheral portion of the target substrate or the support substrate, which is coated with the adhesive in the adhesive coating operation, to thereby remove the adhesive on the outer peripheral portion; and a joining operation that includes pressing and joining the target substrate and the support substrate together, in which the adhesive on the outer peripheral portion is removed in the adhesive removing operation, and the support substrate coated with no adhesive, or pressing and joining the support substrate, in which the adhesive on the outer peripheral portion is removed in the adhesive removing operation, and the target substrate coated with no adhesive.
    Type: Grant
    Filed: August 3, 2012
    Date of Patent: November 1, 2016
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Shinji Okada, Masatoshi Shiraishi, Masatoshi Deguchi
  • Patent number: 9463612
    Abstract: The present disclosure is a joining method that joins a target substrate and a support substrate, wherein the method has: a joining operation that includes pressing and joining the target substrate and the support substrate by interposing an adhesive therebetween; and an adhesive removing operation that includes supplying a solvent of the adhesive to the outer adhesive that is the adhesive between the target substrate and the support substrate protruding in the joining operation from the outer lateral surface of the stacked substrate made by joining the target substrate and the support substrate, and to remove the surface of the outer adhesive so that the outer adhesive is formed at a predetermined size.
    Type: Grant
    Filed: August 30, 2012
    Date of Patent: October 11, 2016
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Shinji Okada, Masatoshi Shiraishi, Masatoshi Deguchi
  • Patent number: 8899289
    Abstract: When joining a processing target substrate and a supporting substrate together by suction-holding the processing substrate and the supporting substrate respectively on a first holding unit and a second holding unit arranged to face each other and pressing the second holding unit toward the first holding unit while heating the substrates by heating mechanisms of the holding units, the present invention preheats at least the processing target substrate before suction-holding the processing target substrate on the first holding unit to suppress generation of particles when joining the processing target substrate and the supporting substrate together so as to properly perform the joining of the processing target substrate and the supporting substrate.
    Type: Grant
    Filed: September 13, 2012
    Date of Patent: December 2, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Masatoshi Deguchi, Masatoshi Shiraishi, Shinji Okada
  • Publication number: 20140335633
    Abstract: A superposed wafer is separated to a processing target wafer and a supporting wafer while being heated. Then, an adhesive on a joint surface of the processing target wafer is removed by supplying an organic solvent onto the joint surface of the processing target wafer. Then, an oxide film formed on the predetermined pattern on the joint surface of the processing target wafer is removed by supplying acetic acid to the joint surface of the processing target wafer. Then, the joint surface of the processing target wafer is inspected. Then, based on an inspection result, the adhesive on the joint surface of the processing target wafer is removed and the oxide film formed on the predetermined pattern on the joint surface of the processing target wafer is removed.
    Type: Application
    Filed: August 22, 2012
    Publication date: November 13, 2014
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Shinji Okada, Masatoshi Shiraishi, Masatoshi Deguchi
  • Publication number: 20140224414
    Abstract: The present disclosure is a joining method that joins a target substrate and a support substrate, wherein the method has: a joining operation that includes pressing and joining the target substrate and the support substrate by interposing an adhesive therebetween; and an adhesive removing operation that includes supplying a solvent of the adhesive to the outer adhesive that is the adhesive between the target substrate and the support substrate protruding in the joining operation from the outer lateral surface of the stacked substrate made by joining the target substrate and the support substrate, and to remove the surface of the outer adhesive so that the outer adhesive is formed at a predetermined size.
    Type: Application
    Filed: August 30, 2012
    Publication date: August 14, 2014
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Shinji Okada, Masatoshi Shiraishi, Masatoshi Deguchi
  • Publication number: 20140224763
    Abstract: This joining method of joining a target substrate and a support substrate includes: an adhesive coating operation that includes coating the target substrate or the support substrate with an adhesive; an adhesive removing operation that includes supplying a solvent of the adhesive onto an outer peripheral portion of the target substrate or the support substrate, which is coated with the adhesive in the adhesive coating operation, to thereby remove the adhesive on the outer peripheral portion; and a joining operation that includes pressing and joining the target substrate and the support substrate together, in which the adhesive on the outer peripheral portion is removed in the adhesive removing operation, and the support substrate coated with no adhesive, or pressing and joining the support substrate, in which the adhesive on the outer peripheral portion is removed in the adhesive removing operation, and the target substrate coated with no adhesive.
    Type: Application
    Filed: August 3, 2012
    Publication date: August 14, 2014
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Shinji Okada, Masatoshi Shiraishi, Masatoshi Deguchi
  • Publication number: 20130071996
    Abstract: When joining a processing target substrate and a supporting substrate together by suction-holding the processing substrate and the supporting substrate respectively on a first holding unit and a second holding unit arranged to face each other and pressing the second holding unit toward the first holding unit while heating the substrates by heating mechanisms of the holding units, the present invention preheats at least the processing target substrate before suction-holding the processing target substrate on the first holding unit to suppress generation of particles when joining the processing target substrate and the supporting substrate together so as to properly perform the joining of the processing target substrate and the supporting substrate.
    Type: Application
    Filed: September 13, 2012
    Publication date: March 21, 2013
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Masatoshi DEGUCHI, Masatoshi SHIRAISHI, Shinji OKADA
  • Publication number: 20130062013
    Abstract: A joint apparatus that joins a processing target substrate and a supporting substrate together, includes: a processing container that is capable of hermetically closing an inside thereof; a joint unit that joins the processing target substrate and the supporting substrate together by pressing the processing target substrate and the supporting substrate via an adhesive; and a superposed substrate temperature regulation unit that temperature-regulates a superposed substrate joined in the joint unit, wherein the joint unit and the superposed substrate temperature regulation unit are arranged in the processing container, A delivery unit for delivering the processing target substrate, the supporting substrate, or the superposed substrate to/from an outside of the processing container is provided in the processing container, and the superposed substrate temperature regulation unit is provided in the delivery unit.
    Type: Application
    Filed: September 11, 2012
    Publication date: March 14, 2013
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Shinji OKADA, Masatoshi SHIRAISHI, Masatoshi DEGUCHI, Naoto YOSHITAKA, Shintaro SUGIHARA, Masataka MATSUNAGA
  • Patent number: 7678532
    Abstract: The present invention provides a method of processing a substrate, comprising a reflow process for forming a desired pattern by dissolving a resist pattern, whereby occurrence of defectives, such as disconnection, can be prevented, and a pattern having an appropriate uniformity can be formed efficiently on each predetermined area desired to be masked. From a photoresist pattern 206 including thicker film portions and thinner film portions, the thinner film portions are removed by a re-developing process. Next, the photoresist so formed by the re-developing process on a backing layer 205 is dissolved such that it passes through a stepped portion 205a formed at each edge portion 205b of the backing layer 205, thereby masking a predetermined area Tg.
    Type: Grant
    Filed: March 1, 2007
    Date of Patent: March 16, 2010
    Assignee: Tokyo Electron Limited
    Inventors: Yutaka Asou, Masatoshi Shiraishi
  • Patent number: 7670960
    Abstract: Disclosed is a substrate processing method that dissolves and deforms a photoresist film having a first pattern formed on a substrate to reshape the resist film into a second pattern. The method includes: evacuating a processing chamber, thereby reducing an internal pressure of the processing chamber from a standard pressure to a first target pressure lower than the standard pressure; introducing a solvent vapor-containing atmosphere into the processing chamber, thereby bringing the internal pressure back to the standard pressure; dissolving the resist film by a solvent contained in the solvent vapor-containing atmosphere; and evacuating a processing chamber, thereby reducing the internal pressure to a second target pressure higher than the first target pressure and lower than the standard pressure and discharging the solvent vapor-containing atmosphere from the processing chamber.
    Type: Grant
    Filed: March 2, 2007
    Date of Patent: March 2, 2010
    Assignee: Tokyo Electron Limited
    Inventors: Yutaka Asou, Masatoshi Shiraishi
  • Patent number: 7550043
    Abstract: A processing chamber actually performs a heating process for a substrate. The processing chamber has an upper plate, a lower plate, and an exhaust opening. The upper plate heats a resist from a front surface of the substrate. The lower plate heats the resist from a rear surface of the substrate. The exhaust opening exhausts gas from the processing chamber. The upper plate is disposed in such a manner that it can be raised and lowered in the processing chamber by an upper air cylinder that composes an upper driving mechanism. The lower plate is disposed on a floor of the processing chamber. The exhaust opening is connected to a pump through a pipe. Heating temperature and heating time of the upper plate and the lower plate are controlled by a heating control portion. A pressure in the processing chamber is controlled by a pump. The pump is controlled by a pressure controlling portion.
    Type: Grant
    Filed: December 16, 2003
    Date of Patent: June 23, 2009
    Assignee: Tokyo Electron Limited
    Inventors: Masatoshi Shiraishi, Masatsugu Nakama, Hideyuki Takamori
  • Publication number: 20070205181
    Abstract: Disclosed is a substrate processing method that dissolves and deforms a photoresist film having a first pattern formed on a substrate to reshape the resist film into a second pattern. The method includes: evacuating a processing chamber, thereby reducing an internal pressure of the processing chamber from a standard pressure to a first target pressure lower than the standard pressure; introducing a solvent vapor-containing atmosphere into the processing chamber, thereby bringing the internal pressure back to the standard pressure; dissolving the resist film by a solvent contained in the solvent vapor-containing atmosphere; and evacuating a processing chamber, thereby reducing the internal pressure to a second target pressure higher than the first target pressure and lower than the standard pressure and discharging the solvent vapor-containing atmosphere from the processing chamber.
    Type: Application
    Filed: March 2, 2007
    Publication date: September 6, 2007
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Yutaka Asou, Masatoshi Shiraishi
  • Publication number: 20070207405
    Abstract: The present invention provides a method of processing a substrate, comprising a reflow process for forming a desired pattern by dissolving a resist pattern, whereby occurrence of defectives, such as disconnection, can be prevented, and a pattern having an appropriate uniformity can be formed efficiently on each predetermined area desired to be masked. From a photoresist pattern 206 including thicker film portions and thinner film portions, the thinner film portions are removed by a re-developing process. Next, the photoresist so formed by the re-developing process on a backing layer 205 is dissolved such that it passes through a stepped portion 205a formed at each edge portion 205b of the backing layer 205, thereby masking a predetermined area Tg.
    Type: Application
    Filed: March 1, 2007
    Publication date: September 6, 2007
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Yutaka Asou, Masatoshi Shiraishi
  • Publication number: 20040126713
    Abstract: A processing chamber actually performs a heating process for a substrate. The processing chamber has an upper plate, a lower plate, and an exhaust opening. The upper plate heats a resist from a front surface of the substrate. The lower plate heats the resist from a rear surface of the substrate. The exhaust opening exhausts gas from the processing chamber. The upper plate is disposed in such a manner that it can be raised and lowered in the processing chamber by an upper air cylinder that composes an upper driving mechanism. The lower plate is disposed on a floor of the processing chamber. The exhaust opening is connected to a pump through a pipe. Heating temperature and heating time of the upper plate and the lower plate are controlled by a heating control portion. A pressure in the processing chamber is controlled by a pump. The pump is controlled by a pressure controlling portion.
    Type: Application
    Filed: December 16, 2003
    Publication date: July 1, 2004
    Inventors: Masatoshi Shiraishi, Masatsugu Nakama, Hideyuki Takamori
  • Patent number: 5939130
    Abstract: A coating film forming method for forming a resist coating film on an upper surface of a wafer held by a spin chuck in a chamber includes (a) the step of keeping preliminary correlation data representing correlation between a wafer rotating speed and the thickness of the resist coating film formed on the wafer in the chamber, (b) the step of conveying the wafer into the chamber and holding the wafer by the spin chuck, (c) the step of pouring the resist liquid onto the wafer and spin-rotating the wafer to form a resist coating film on the upper surface of the wafer, (d) the step of detecting the thickness of the formed resist coating film by a sensor, (e) the step of detecting a rotating speed of the spin chuck by a sensor, and (f) the step of, on the basis of the detected film thickness and the preliminary correlation data, correcting a set rotating speed of the spin chuck to feedback-control a resist coating process for a next wafer.
    Type: Grant
    Filed: May 27, 1997
    Date of Patent: August 17, 1999
    Assignee: Tokyo Electron Limited
    Inventors: Masatoshi Shiraishi, Yukio Kiba, Kunie Ogata