Patents by Inventor Masatoshi Takada

Masatoshi Takada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7409255
    Abstract: A module evaluation method and system which can quickly determine overall effectiveness of the modular construction method in an automatic manner, taking into account the transportation cost and so on. A module evaluation unit prepares constructed-equipment physical quantity data from constructed-equipment layout data, and determines an in-module unit-rate reduction effect resulted from executing construction work of the constructed equipment in the module in a factory where working efficiency is higher than a field. The module evaluation unit also determines a module transportation cost effect, a module temporary construction cost effect, and a density reduction effect that is resulted from a reduction of density in a space not occupied by a module with application of modularization and efficiency of installation work is increased.
    Type: Grant
    Filed: February 13, 2007
    Date of Patent: August 5, 2008
    Assignee: Hitachi, Ltd.
    Inventors: Masatoshi Takada, Koichi Murayama, Kenji Akagi
  • Patent number: 7398193
    Abstract: A wall-thickness thinning rate at a not-measured position is estimated using information having a small number of measured points. Simulation of behavior of fluid flowing inside a pipe line is performed based on wall-thickness data of pips and three-dimensional layout data of the pipe line including the pips using a computer, and simulated wall-thickness thinned data of the pipes composing the pipe line is calculated from change of the simulated behavior of fluid.
    Type: Grant
    Filed: June 13, 2006
    Date of Patent: July 8, 2008
    Assignee: Hitachi-GE Nuclear Energy, Ltd.
    Inventors: Kenji Araki, Masatoshi Takada, Masakazu Hisatsune, Satoru Aoike, Kenji Utaka, Masafumi Noujima, Chikara Takeuchi
  • Publication number: 20080086347
    Abstract: A business information management system includes a data connection relationship information storage section storing connection relationships of data items forming a business information database, a data connection accuracy information storage section that stores data connection accuracy between data item pairs having a connection relationship, and a data change section that chances data in the business information database by inputting data thereto. A change affected data extraction section extracts chance affected data items by tracing first data items having a connection relationship with an originally chanced data item and second data items having a connection relationship with the first data items until there is no connection relationship, a change effect probability calculation section calculates change effect probability of the change affected data based on data connection accuracy, and a change affected data display section displays the change effect probability on a display unit.
    Type: Application
    Filed: October 3, 2007
    Publication date: April 10, 2008
    Inventors: Takeshi YOKOTA, Kenji ARAKI, Masanori TAKAMOTO, Masatoshi TAKADA, Tsuyoshi NIINO
  • Publication number: 20080086284
    Abstract: A remote maintenance system is comprised of: a monitoring computer for monitoring a facility; and a monitoring center computer for using maintenance management. The monitoring computer has a database for storing image data of the monitored facility. The monitoring center computer includes: a database for storing CAD data for the monitored facility. The monitoring center computer provides coordinates to the image data sent from the monitoring computer, and superposes the image coordinate data and CAD coordinate data for the CAD. And the center computer locates a needed maintenance spot on the basis of a result of the superposition processing.
    Type: Application
    Filed: September 21, 2007
    Publication date: April 10, 2008
    Inventors: Naoyuki Nagafuchi, Hidenori Inoue, Toshihiro Morikawa, Jinichiro Goto, Masatoshi Takada
  • Publication number: 20070260344
    Abstract: A module evaluation method and system which can quickly determine overall effectiveness of the modular construction method in an automatic manner, taking into account the transportation cost and so on. A module evaluation unit prepares constructed-equipment physical quantity data from constructed-equipment layout data, and determines an in-module unit-rate reduction effect resulted from executing construction work of the constructed equipment in the module in a factory where working efficiency is higher than a field. The module evaluation unit also determines a module transportation cost effect, a module temporary construction cost effect, and a density reduction effect that is resulted from a reduction of density in a space not occupied by a module with application of modularization and efficiency of installation work is increased.
    Type: Application
    Filed: February 13, 2007
    Publication date: November 8, 2007
    Inventors: Masatoshi TAKADA, Koichi Murayama, Kenji Akagi
  • Publication number: 20070205870
    Abstract: To support a tag information reader to read information from radio communication tags, attached to each of a plurality of structural objects in a plant and to provide the locations of unread radio communication tags, a tag information acquisition unit acquires information on radio communication tags actually read by the tag information reader. Next, an unread tag extraction unit extracts radio communication tags which are a plurality of radio communication tags stored in a tag arrangement data file but from which information cannot be acquired by the tag information acquisition unit, and an unread tag arrangement calculation unit acquires arrangement data on the extracted radio communication tags. The arrangement data on those radio communication tags is sent to a display unit for displaying the radio communication tags.
    Type: Application
    Filed: October 6, 2006
    Publication date: September 6, 2007
    Inventors: Masatoshi Takada, Kenji Araki, Kenji Akagi, Koichi Murayama
  • Patent number: 7256722
    Abstract: A high accuracy D/A converter includes D/A converter sections including 64 current cells for outputting a current corresponding to 1 LSB of 8-bit input data and a D/A converter section including 63 current cells, a reference current generating section for supplying the respective D/A converter sections with reference currents, and a decoder for activating each of the current cells from the D/A converter sections to the D/A converter section in the stated order in a cyclic manner when the 8-bit input data value is increased, and deactivating one each of the activated current cells from the D/A converter section to the D/A converter section in the stated order in a cyclic manner when the 8-bit input data value is decreased.
    Type: Grant
    Filed: April 19, 2006
    Date of Patent: August 14, 2007
    Assignee: Kawasaki Microelectronics, Inc.
    Inventors: Masayuki Ueno, Masatoshi Takada, Tatsuyuki Araki
  • Publication number: 20070102505
    Abstract: When an RFID is attached to an object to assist testing operations, the following problems are encountered; (1) the RFID of write type tends to cause a failure and is troublesome due to the necessity of rewrite each time the situation is changed, (2) the incorporation of the reader function in a terminal block increases the cost, and (3) the known techniques are targeted for only the connecting operation and are not adapted for a sequence test that takes the most expense in time and effort. The operations are aided by using an RFID reader and a terminal having the function for accessing a database of circuit information, RFID information, and test procedure information.
    Type: Application
    Filed: October 27, 2006
    Publication date: May 10, 2007
    Inventors: Toshimi Yokota, Kenji Araki, Kenji Utaka, Noritaka Matsumoto, Masatoshi Takada, Ryosuke Shigemi, Chikara Ota
  • Patent number: 7162354
    Abstract: A gas turbine washing-date determination apparatus of the present invention is equipped with a sum cost calculation means for calculating a sum of loss cost due to not washing a compressor from a compressor efficiency calculated, and determines a gas turbine washing-date with using the sum of the loss cost. Meanwhile, in the gas turbine washing-date determination apparatus the compressor efficiency is calculated from process data of a gas turbine plant, and a compressor washing-date is determined, based on the compressor efficiency.
    Type: Grant
    Filed: July 23, 2004
    Date of Patent: January 9, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Masatoshi Takada, Yoshiharu Hayashi, Yoshitaka Kojima
  • Publication number: 20060287762
    Abstract: An RFID installation position planning technology according to the present invention is used for outputting an optimum RFID installation position, which facilitates access to an RFID tag, before construction with work pieces. Work pieces layout data storage device stores work piece layout data including shape and disposition data of a work piece. A working route data storage device stores working route data including position data of works involving communication with the RFID tag. RFID tag position planning means determines communication accessibility to each point on a surface of the work piece from a work position, based on a distance between the work position and the RFID tag, presence or absence of an obstacle there between, and a communicatable distance of the RFID tag. Moreover, the RFID tag position planning means determines and outputs an optimum RFID tag installation position.
    Type: Application
    Filed: June 13, 2006
    Publication date: December 21, 2006
    Inventors: Masatoshi Takada, Kenji Araki, Kouichi Ushiroda
  • Publication number: 20060244646
    Abstract: A high accuracy D/A converter includes D/A converter sections including 64 current cells for outputting a current corresponding to 1 LSB of 8-bit input data and a D/A converter section including 63 current cells, a reference current generating section for supplying the respective D/A converter sections with reference currents, and a decoder for activating each of the current cells from the D/A converter sections to the D/A converter section in the stated order in a cyclic manner when the 8-bit input data value is increased, and deactivating one each of the activated current cells from the D/A converter section to the D/A converter section in the stated order in a cyclic manner when the 8-bit input data value is decreased.
    Type: Application
    Filed: April 19, 2006
    Publication date: November 2, 2006
    Applicant: KAWASAKI MICROELECTRONICS, INC.
    Inventors: Masayuki Ueno, Masatoshi Takada, Tatsuyuki Araki
  • Publication number: 20060229855
    Abstract: A wall-thickness thinning rate at a not-measured position is estimated using information having a small number of measured points. Simulation of behavior of fluid flowing inside a pipe line is performed based on wall-thickness data of pips and three-dimensional layout data of the pipe line including the pips using a computer, and simulated wall-thickness thinned data of the pipes composing the pipe line is calculated from change of the simulated behavior of fluid.
    Type: Application
    Filed: June 13, 2006
    Publication date: October 12, 2006
    Inventors: Kenji Araki, Masatoshi Takada, Masakazu Hisatsune, Satoru Aoike, Kenji Utaka, Masafumi Noujima, Chikara Takeuchi
  • Patent number: 7089165
    Abstract: A wall-thickness thinning rate at a not-measured position is estimated using information having a small number of measured points. Simulation of behavior of fluid flowing inside a pipe line is performed based on wall-thickness data of pips and three-dimensional layout data of the pipe line including the pips using a computer, and simulated wall-thickness thinned data of the pipes composing the pipe line is calculated from change of the simulated behavior of fluid.
    Type: Grant
    Filed: March 2, 2005
    Date of Patent: August 8, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Kenji Araki, Masatoshi Takada, Masakazu Hisatsune, Satoru Aoike, Kenji Utaka, Masafumi Noujima, Chikara Takeuchi
  • Publication number: 20060136774
    Abstract: A remote maintenance system is comprised of: a monitoring computer for monitoring a facility; and a monitoring center computer for using maintenance management. The monitoring computer has a database for storing image data of the monitored facility. The monitoring center computer includes: a database for storing CAD data for the monitored facility. The monitoring center computer provides coordinates to the image data sent from the monitoring computer, and superposes the image coordinate data and CAD coordinate data for the CAD. And the center computer locates a needed maintenance spot on the basis of a result of the superposition processing.
    Type: Application
    Filed: November 4, 2005
    Publication date: June 22, 2006
    Inventors: Naoyuki Nagafuchi, Hidenori Inoue, Toshihiro Morikawa, Jinichiro Goto, Masatoshi Takada
  • Patent number: 7035777
    Abstract: A wall-thickness thinning rate at a not-measured position is estimated using information having a small number of measured points. Simulation of behavior of fluid flowing inside a pipe line is performed based on wall-thickness data of pipes and three-dimensional layout data of the pipe line including the pipes using a computer, and simulated wall-thickness thinned data of the pipes composing the pipe line is calculated from change of the simulated behavior of fluid.
    Type: Grant
    Filed: March 22, 2001
    Date of Patent: April 25, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Kenji Araki, Masatoshi Takada, Masakazu Hisatsune, Satoru Aoike, Kenji Utaka, Masafumi Noujima, Chikara Takeuchi
  • Patent number: 7031402
    Abstract: An interference signal removal system includes interference signal estimating means for estimating an interference signal contained in a received signal based on the received signal and a result obtained by removing an interference signal from the received signal, interference signal removing means for removing from the received signal the interference signal estimated by the interference signal estimating means; and interference signal estimation controlling means for storing the interference signal estimation result of the interference signal estimating means in memory and controlling the interference signal estimation by the interference signal estimating means so as to estimate an interference signal contained in the received signal based on a past interference signal estimation result stored in memory.
    Type: Grant
    Filed: March 20, 2002
    Date of Patent: April 18, 2006
    Assignee: Hitachi Kokusai Electric Inc.
    Inventor: Masatoshi Takada
  • Patent number: 6985097
    Abstract: An error correction circuit and a folding ADC are provided. In the folding ADC, the range of the input voltage to an upper ADC circuit and to a lower ADC circuit is shifted by a predetermined voltage toward higher and lower electric potential sides. The error correction circuit outputs the conversion result of the upper bits as is, or corrects the conversion result of the upper bits by either subtracting or adding 1 from or to the conversion result of the upper bits in accordance with the least significant bit within the conversion result of the upper bits and in accordance with the polarity of a code having different polarities between a period in which the voltage level of one folding signal among a plurality of folding signals output from the folding circuit is higher than the center level and a period in which the voltage level is lower.
    Type: Grant
    Filed: January 25, 2005
    Date of Patent: January 10, 2006
    Assignee: Kawasaki Microelectronics, Inc.
    Inventors: Masayuki Ueno, Hiroshi Ogasawara, Masatoshi Takada
  • Patent number: 6972759
    Abstract: An image matching device for extracting differences between an image taken of an actual object and model data with high accuracy. The image matching device includes a model data storage unit for storing model data of a layout of component parts of a plant, an image data storage unit for storing, for example, data of images taken of the plant, a parts library containing data on parts, heat insulating material library containing information of heat insulating materials, a model correcting unit, and a matching unit. The model correcting unit produces, based on model data and parts data, synthesized image data of an image viewed from the same position and in the same direction as actual image data is obtained by taking a photo of the plant. The matching unit matches a synthesized image to a real image.
    Type: Grant
    Filed: July 10, 2002
    Date of Patent: December 6, 2005
    Assignee: Hitachi, Ltd.
    Inventors: Masatoshi Takada, Kenji Araki, Koushi Sakata, Chikara Takeuchi, Masakazu Hisatsune
  • Patent number: 6937676
    Abstract: An interference-signal removing apparatus is provided for removing narrow-band interference signals from input signals including wide-band desired signals and the narrow-band interference signals, which suppresses that even desired signals are removed. The interference-signal removing apparatus includes an extraction section for extracting interference signals from input signals, a removal circuit for removing extracted interference signals from input signals, an extraction control section for controlling extraction of interference signals by the extraction section in accordance with the removal result, and an extraction-amount suppression section for suppressing the interference signal amount to be extracted in accordance with input signals.
    Type: Grant
    Filed: September 24, 2001
    Date of Patent: August 30, 2005
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Masatoshi Takada, Yoichi Murakami
  • Publication number: 20050168368
    Abstract: An error correction circuit and a folding ADC are provided. In the folding ADC, the range of the input voltage to an upper ADC circuit and to a lower ADC circuit is shifted by a predetermined voltage toward higher and lower electric potential sides. The error correction circuit outputs the conversion result of the upper bits as is, or corrects the conversion result of the upper bits by either subtracting or adding 1 from or to the conversion result of the upper bits in accordance with the least significant bit within the conversion result of the upper bits and in accordance with the polarity of a code having different polarities between a period in which the voltage level of one folding signal among a plurality of folding signals output from the folding circuit is higher than the center level and a period in which the voltage level is lower.
    Type: Application
    Filed: January 25, 2005
    Publication date: August 4, 2005
    Applicant: KAWASAKI MICROELECTRONICS, INC.
    Inventors: Masayuki Ueno, Hiroshi Ogasawara, Masatoshi Takada