Patents by Inventor Masaya Inoko

Masaya Inoko has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Memory device, control method for the same, control program for the same, memory card, circuit board and electronic equipment
    Patent number: 8169838
    Abstract: A memory device includes a single or a plurality of memory chips. In the memory device (memory module), the single memory chip or each of the plurality of memory chips has a memory part storing control data such as specification data and function data, and control data stored on the memory part is rewritable. Control data stored on the memory part separately disposed on each memory chip enables separate use of the memory chip, which improves compatibility and flexibility of the memory.
    Type: Grant
    Filed: September 30, 2008
    Date of Patent: May 1, 2012
    Assignee: Fujitsu Limited
    Inventors: Toshihiro Miyamoto, Akio Takigami, Masaya Inoko, Takayoshi Suzuki, Hiroyuki Ono
  • Memory device, control method for the same, control program for the same, memory card, circuit board and electronic equipment
    Patent number: 8159886
    Abstract: A memory device having a single or a plurality of memory chips includes a memory part (control register, SPD memory unit) inside each memory chip, which memory part stores control data concerning the memory chip. The memory device enables writing-in or readout of the control data stored on the memory part to be able to set any desired control data for each memory chip, and, when the memory device has the plurality of memory chips, enables separate use of each of the memory chips.
    Type: Grant
    Filed: September 30, 2008
    Date of Patent: April 17, 2012
    Assignee: Fujitsu Limited
    Inventors: Toshihiro Miyamoto, Akio Takigami, Masaya Inoko, Takayoshi Suzuki, Hiroyuki Ono
  • MEMORY DEVICE, CONTROL METHOD FOR THE SAME, CONTROL PROGRAM FOR THE SAME, MEMORY CARD, CIRCUIT BOARD AND ELECTRONIC EQUIPMENT
    Publication number: 20090034342
    Abstract: A memory device includes a single or a plurality of memory chips. In the memory device (memory module), the single memory chip or each of the plurality of memory chips has a memory part storing control data such as specification data and function data, and control data stored on the memory part is rewritable. Control data stored on the memory part separately disposed on each memory chip enables separate use of the memory chip, which improves compatibility and flexibility of the memory.
    Type: Application
    Filed: September 30, 2008
    Publication date: February 5, 2009
    Applicant: Fujitsu Limited
    Inventors: Toshihiro Miyamoto, Akio Takigami, Masaya Inoko, Takayoshi Suzuki, Hiroyuki Ono
  • MEMORY DEVICE, CONTROL METHOD FOR THE SAME, CONTROL PROGRAM FOR THE SAME, MEMORY CARD, CIRCUIT BOARD AND ELECTRONIC EQUIPMENT
    Publication number: 20090021991
    Abstract: A memory device having a single or a plurality of memory chips includes a memory part (control register, SPD memory unit) inside each memory chip, which memory part stores control data concerning the memory chip. The memory device enables writing-in or readout of the control data stored on the memory part to be able to set any desired control data for each memory chip, and, when the memory device has the plurality of memory chips, enables separate use of each of the memory chips.
    Type: Application
    Filed: September 30, 2008
    Publication date: January 22, 2009
    Applicant: Fujitsu Limited
    Inventors: Toshihiro MIYAMOTO, Akio Takigami, Masaya Inoko, Takayoshi Suzuki, Hiroyuki Ono
  • MEMORY DEVICE, SUPPORTING METHOD FOR ERROR CORRECTION THEREOF, SUPPORTING PROGRAM THEREOF, MEMORY CARD, CIRCUIT BOARD AND ELECTRONIC APPARATUS
    Publication number: 20090019325
    Abstract: A memory device (memory module) having one or a plurality of memory chips is disclosed. By including in a memory chip an error generation part to generate an error, an error is generated in a specific area of a memory in accordance with an address specification, thereby confirmation of an ECC function is facilitated. The error generation part includes an error code generation part that generates an error code. The memory chip is configured by one or a plurality of memory matrixes.
    Type: Application
    Filed: September 30, 2008
    Publication date: January 15, 2009
    Applicant: Fujitsu Limited
    Inventors: Toshihiro MIYAMOTO, Akio TAKIGAMI, Masaya INOKO, Takayoshi SUZUKI, Hiroyuki ONO