Abstract: An output circuit device has an output circuit connected between a first power supply line and a second power supply line via a control circuit having at least one isolating transistor. A control voltage held at a constant level is applied to a control electrode of the isolating transistor, and the control voltage is a voltage at a level that works to attenuate high-frequency components contained in a voltage supplied from the first or the second power supply line.

Abstract: A receiver circuit has an equalizer that equalizes a received signal propagating through a transmission medium; a data detection circuit that detects an analog output signal of the equalizer at a data sample timing and outputs a digital signal; an intersymbol interference detection circuit that detects an intersymbol interference level from the analog output signal of the equalizer at the data sample timing and from the digital signal of the data detection circuit; and an equalization characteristic control unit that controls the characteristic of the equalizer to minimize the detected intersymbol interference level. The receiver circuit further has a data sample timing control unit in which the data sample timing is controlled to a sample timing at which the difference between the amplitude of the analog output waveform of the equalizer with respect to an impulse and the amplitude of an ideal impulse response waveform is minimal.

Abstract: An output circuit device has an output circuit connected between a first power supply line and a second power supply line via a control circuit having at least one isolating transistor. A control voltage held at a constant level is applied to a control electrode of the isolating transistor, and the control voltage is a voltage at a level that works to attenuate high-frequency components contained in a voltage supplied from the first or the second power supply line.

Abstract: An output circuit device has an output circuit connected between a first power supply line and a second power supply line via a control circuit having at least one isolating transistor. A control voltage held at a constant level is applied to a control electrode of the isolating transistor, and the control voltage is a voltage at a level that works to attenuate high-frequency components contained in a voltage supplied from the first or the second power supply line.

Abstract: An output circuit device has an output circuit connected between a first power supply line and a second power supply line via a control circuit having at least one isolating transistor. A control voltage held at a constant level is applied to a control electrode of the isolating transistor, and the control voltage is a voltage at a level that works to attenuate high-frequency components contained in a voltage supplied from the first or the second power supply line.

Abstract: A timing signal generating system has a clock signal generating circuit, a synchronizing circuit, a phase code recognizing circuit, and a calibration circuit. The clock signal generating circuit generates at least one first clock signal upon receipt of at least one reference clock signal by controlling an output phase thereof with a digital code signal. The synchronizing circuit hands over signals between a group of circuits operated by the first clock signal and an internal circuit operated by a second clock signal. The phase code recognizing circuit recognizes a phase code when the phases of the first clock signal and of the second clock signal are in a particular relationship. The calibration circuit calibrates a relationship between a value of the recognized phase code and a phase difference between the first and second clock signals. The synchronizing circuit is controlled by using phase code data calibrated by the calibration circuit.