Patents by Inventor Masaya TOBA

Masaya TOBA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11990396
    Abstract: An organic interposer includes: a first organic insulating layer including a groove; a first metal wire located in the groove; a barrier metal material covering the first metal wire; and a second metal wire located above the first metal wire, wherein the barrier metal material includes: a first barrier metal film interposed between the first metal wire and an inner surface of the groove; and a second barrier metal film located on the first metal wire, and wherein the second metal wire is in contact with both of the first barrier metal film and the second barrier metal film.
    Type: Grant
    Filed: December 19, 2022
    Date of Patent: May 21, 2024
    Assignee: RESONAC CORPORATION
    Inventors: Kazuyuki Mitsukura, Masaya Toba, Yoshinori Ejiri, Kazuhiko Kurafuchi
  • Patent number: 11979990
    Abstract: A method for manufacturing a wiring board according to the present disclosure includes: in the following order, (a) a step of irradiating an insulating layer composed of a resin composition with active energy rays; (b) a step of adsorbing an electroless plating catalyst to the insulating layer; and (c) a step of forming a metal layer on a surface of the insulating layer by electroless plating, in which in the step (a), a modified region having a thickness of 20 nm or more in a depth direction from the surface of the insulating layer and voids communicating from the surface of the insulating layer is formed by irradiation of the active energy rays.
    Type: Grant
    Filed: December 19, 2019
    Date of Patent: May 7, 2024
    Assignee: RESONAC CORPORATION
    Inventors: Masaya Toba, Kazuhiko Kurafuchi, Takashi Masuko, Kazuyuki Mitsukura, Shinichiro Abe
  • Publication number: 20240057263
    Abstract: A method for manufacturing a wiring board including: providing a laminate including an insulating material layer and a copper layer provided on a surface of the insulating material layer, and in which the copper layer is an electroless copper plating layer; forming a resist pattern including a groove reaching a surface of the copper layer on the surface of the copper layer; and filling the groove with a conductive material containing copper by electrolytic copper plating. The thickness of the electroless copper plating layer is, for example, 20 nm to 200 nm.
    Type: Application
    Filed: January 6, 2021
    Publication date: February 15, 2024
    Inventors: Masaya TOBA, Masaki YAMAGUCHI, Kazuyuki MITSUKURA
  • Publication number: 20240049395
    Abstract: A layered plate including a copper layer having a thickness of 5 ?m or less, and a resin layer provided on a surface of the copper layer, in which a water absorption rate of the resin layer is 1% or less after being left in an environment of 130° C. in temperature and 85% in relative humidity for 200 hours.
    Type: Application
    Filed: December 25, 2020
    Publication date: February 8, 2024
    Inventors: Masaya TOBA, Kazuyuki MITSUKURA, Masaki YAMAGUCHI
  • Publication number: 20240030044
    Abstract: A method for manufacturing a wiring board includes preparing a structure body in which a resin sheet having a glass cloth arranged in an organic resin is attached onto a support body having a metal layer provided on a surface thereof or onto a built-in wiring layer provided on the support body, forming a recess by excimer laser in a first resin layer region in which the glass cloth does not exist on a surface side of the resin sheet, forming an opening portion reaching the metal layer on the support body from the surface of the resin sheet, and forming a wiring layer in the recess and the opening portion.
    Type: Application
    Filed: September 29, 2021
    Publication date: January 25, 2024
    Inventors: Masaya TOBA, Kazuyuki MITSUKURA, Masaki YAMAGUCHI
  • Publication number: 20240015889
    Abstract: A method for producing a wiring board, including: a step of pretreating the surface of a metal layer exposed into an opening by bringing the surface into contact with a pretreatment liquid at a predetermined pretreatment temperature; and a step of forming a copper plating layer on the metal layer by electrolytic plating. The resist layer and the pretreatment liquid are selected such that a mass change rate of the resist layer when the resist layer before being exposed and developed is immersed in the pretreatment liquid is ?2.0% by mass or more. The mass change rate is a value calculated by Expression: Mass change rate (% by mass)={(W1?W0)/W0}×100. W1 is the mass of the resist layer after a laminated body including a resist layer 3 and a copper foil is immersed in the pretreatment liquid at the pretreatment temperature for 30 minutes.
    Type: Application
    Filed: September 9, 2021
    Publication date: January 11, 2024
    Inventors: Kei TOGASAKI, Kenichi IWASHITA, Keishi ONO, Mao NARITA, Kazuyuki MITSUKURA, Masaya TOBA
  • Publication number: 20230259026
    Abstract: A photosensitive resin composition used for forming an insulating layer includes a resin including an aromatic polyester imide structure, a photopolymerization initiator and a thermal radical polymerization initiator, and when the resin including an aromatic polyester imide structure does not include a (meth)acryl group, the resin composition includes a (meth)acryloyl compound.
    Type: Application
    Filed: August 30, 2022
    Publication date: August 17, 2023
    Inventors: Shinichiro ABE, Kazuyuki MITSUKURA, Masaya TOBA, Yuki IMAZU
  • Publication number: 20230253215
    Abstract: A method for producing a wiring board according to the present disclosure includes: (A) forming a first insulating material layer on a supporting substrate; (B) forming a first opening part in the first insulating material layer; (C) forming a seed layer on the first insulating material layer; (D) providing a resist pattern on a surface of the seed layer; (E) forming a wiring part including a pad and wiring; (F) removing the resist pattern; (G) removing the seed layer; (H) applying a first surface treatment to the surface of the pad; (I) forming a second insulating material layer; (J) forming a second opening part in the second insulating material layer; (K) applying a second surface treatment to the surface of the pad; and (L) heating the second insulating material layer to a temperature equal to or higher than the glass transition temperature of the second insulating material layer.
    Type: Application
    Filed: July 28, 2020
    Publication date: August 10, 2023
    Inventors: Masaya TOBA, Kazuhiko KURAFUCHI, Takashi MASUKO, Kazuyuki MITSUKURA
  • Publication number: 20230209725
    Abstract: Disclosed is a method for manufacturing a wiring structure including a step of forming a wiring on an insulating resin layer. The step of forming the wiring includes: forming a modified region including pores in a surface layer of the insulating resin layer by treating a surface of the insulating resin layer with a treatment method including surface modification; forming a seed layer on the surface of the insulating resin layer by sputtering; and forming the wiring on the seed layer by electrolytic copper plating. The disclosed method may include, in this order: a step of forming a surface treatment agent layer that covers a surface of the wiring by treating the surface of the wiring with a surface treatment agent for improving adhesion; and a step of forming a modified region including pores in a surface layer of a first layer of the insulating resin layer by treating the surface of the first layer of the insulating resin layer with a treatment method including surface modification.
    Type: Application
    Filed: June 23, 2021
    Publication date: June 29, 2023
    Inventors: Masaya TOBA, Kazuyuki MITSUKURA
  • Publication number: 20230118368
    Abstract: An organic interposer includes: a first organic insulating layer including a groove; a first metal wire located in the groove; a barrier metal material covering the first metal wire; and a second metal wire located above the first metal wire, wherein the barrier metal material includes: a first barrier metal film interposed between the first metal wire and an inner surface of the groove; and a second barrier metal film located on the first metal wire, and wherein the second metal wire is in contact with both of the first barrier metal film and the second barrier metal film.
    Type: Application
    Filed: December 19, 2022
    Publication date: April 20, 2023
    Inventors: Kazuyuki MITSUKURA, Masaya TOBA, Yoshinori EJIRI, Kazuhiko KURAFUCHI
  • Patent number: 11562951
    Abstract: An organic interposer includes: a first organic insulating layer including a groove; a first metal wire located in the groove; a barrier metal material covering the first metal wire; and a second metal wire located above the first metal wire, wherein the barrier metal material includes: a first barrier metal film interposed between the first metal wire and an inner surface of the groove; and a second barrier metal film located on the first metal wire, and wherein the second metal wire is in contact with both of the first barrier metal film and the second barrier metal film.
    Type: Grant
    Filed: August 3, 2020
    Date of Patent: January 24, 2023
    Assignee: SHOWA DENKO MATERIALS CO., LTD.
    Inventors: Kazuyuki Mitsukura, Masaya Toba, Yoshinori Ejiri, Kazuhiko Kurafuchi
  • Publication number: 20220071019
    Abstract: A wiring board according to the present disclosure includes a first insulating material layer having a surface with an arithmetic average roughness Ra of 100 nm or less, a metal wiring provided on the surface of the first insulating material layer, and a second insulating material layer provided to cover the metal wiring, in which the metal wiring is configured by a metal layer in contact with the surface of the first insulating material layer and a conductive part stacked on a surface of the metal layer, and a nickel content rate of the metal layer is 0.25 to 20% by mass.
    Type: Application
    Filed: December 19, 2019
    Publication date: March 3, 2022
    Inventors: Masaya TOBA, Kazuhiko KURAFUCHI, Takashi MASUKO, Kazuyuki MITSUKURA, Shinichiro ABE
  • Publication number: 20220071018
    Abstract: A method for manufacturing a wiring board according to the present disclosure includes: in the following order, (a) a step of irradiating an insulating layer composed of a resin composition with active energy rays; (b) a step of adsorbing an electroless plating catalyst to the insulating layer; and (c) a step of forming a metal layer on a surface of the insulating layer by electroless plating, in which in the step (a), a modified region having a thickness of 20 nm or more in a depth direction from the surface of the insulating layer and voids communicating from the surface of the insulating layer is formed by irradiation of the active energy rays.
    Type: Application
    Filed: December 19, 2019
    Publication date: March 3, 2022
    Inventors: Masaya TOBA, Kazuhiko KURAFUCHI, Takashi MASUKO, Kazuyuki MITSUKURA, Shinichiro ABE
  • Publication number: 20220053647
    Abstract: One aspect of the present invention is a method for manufacturing an electronic component, the method including: a first step of applying a metal paste containing metal particles onto a polymer compact in a prescribed pattern to form a metal paste layer; a second step of sintering the metal particles to form metal wiring; a third step of applying a solder paste containing solder particles and a resin component onto the metal wiring to form a solder paste layer; a fourth step of disposing an electronic element on the solder paste layer; and a fifth step of heating the solder paste layer so as to form a solder layer bonding the metal wiring and the electronic element, and so as to form a resin layer covering at least a portion of the solder layer.
    Type: Application
    Filed: September 5, 2019
    Publication date: February 17, 2022
    Applicant: Showa Denko Materials Co., Ltd.
    Inventors: Yoshinori EJIRI, Shinichirou SUKATA, Masaya TOBA, Hideo NAKAKO, Yuki KAWANA, Kosuke URASHIMA, Motoki YONEKURA, Takaaki NOHDOH, Yoshiaki KURIHARA, Hiroshi MASUDA, Keita SONE
  • Publication number: 20200365501
    Abstract: An organic interposer includes: a first organic insulating layer including a groove; a first metal wire located in the groove; a barrier metal material covering the first metal wire; and a second metal wire located above the first metal wire, wherein the barrier metal material includes: a first barrier metal film interposed between the first metal wire and an inner surface of the groove; and a second barrier metal film located on the first metal wire, and wherein the second metal wire is in contact with both of the first barrier metal film and the second barrier metal film.
    Type: Application
    Filed: August 3, 2020
    Publication date: November 19, 2020
    Inventors: Kazuyuki MITSUKURA, Masaya TOBA, Yoshinori EJIRI, Kazuhiko KURAFUCHI
  • Patent number: 10756008
    Abstract: There are provided an organic interposer capable of improving insulation reliability and a method for manufacturing the organic interposer. An organic interposer 10 is provided with: an organic insulating laminate 12 comprising a plurality of organic insulating layers; and a plurality of wires 13 arranged in the organic insulating laminate 12, and each of the wires 13 and each of the organic insulating layers are separated by a barrier metal film 14. The organic insulating laminate 12 may include: a first organic insulating layer 21 having a plurality of grooves 21a each having each of the wires 13 disposed therein; and a second organic insulating layer 22 laminated to the first organic insulating layer 21 in such a way as to embed the wires 13.
    Type: Grant
    Filed: February 23, 2017
    Date of Patent: August 25, 2020
    Assignee: HITACHI CHEMICAL COMPANY, LTD.
    Inventors: Kazuyuki Mitsukura, Masaya Toba, Yoshinori Ejiri, Kazuhiko Kurafuchi
  • Patent number: 10575402
    Abstract: One aspect of the present invention relates to a resin composition comprising a curable resin and a curing agent, which is used for forming an inter-wiring layer insulating layer in contact with a copper wiring.
    Type: Grant
    Filed: September 26, 2017
    Date of Patent: February 25, 2020
    Assignee: HITACHI CHEMICAL COMPANY, LTD.
    Inventors: Shinichiro Abe, Kazuhiko Kurafuchi, Tomonori Minegishi, Kazuyuki Mitsukura, Masaya Toba
  • Publication number: 20190281697
    Abstract: One aspect of the present invention relates to a resin composition comprising a curable resin and a curing agent, which is used for forming an inter-wiring layer insulating layer in contact with a copper wiring.
    Type: Application
    Filed: September 26, 2017
    Publication date: September 12, 2019
    Inventors: Shinichiro ABE, Kazuhiko KURAFUCHI, Tomonori MINEGISHI, Kazuyuki MITSUKURA, Masaya TOBA
  • Patent number: 10388608
    Abstract: To provide a manufacturing method capable of manufacturing a high density semiconductor device excellent in transmission between chips at a favorable yield and at low cost. A method for manufacturing a semiconductor device includes an insulating layer forming step of forming an insulating layer 3 having a trench 4 above a substrate 1, a copper layer forming step of forming a copper layer 5a on the insulating layer 3 so as to fill the trench 4, and a removing step of removing the copper layer 5a on the insulating layer 3 by a fly cutting method so as to retain a copper layer part in the trench 4.
    Type: Grant
    Filed: February 9, 2016
    Date of Patent: August 20, 2019
    Assignee: HITACHI CHEMICAL COMPANY, LTD.
    Inventors: Kazuyuki Mitsukura, Masaya Toba, Kenichi Iwashita, Kohsuke Urashima, Kazuhiko Kurafuchi
  • Publication number: 20190109082
    Abstract: There are provided an organic interposer capable of improving insulation reliability and a method for manufacturing the organic interposer. An organic interposer 10 is provided with: an organic insulating laminate 12 comprising a plurality of organic insulating layers; and a plurality of wires 13 arranged in the organic insulating laminate 12, and each of the wires 13 and each of the organic insulating layers are separated by a barrier metal film 14. The organic insulating laminate 12 may include: a first organic insulating layer 21 having a plurality of grooves 21a each having each of the wires 13 disposed therein; and a second organic insulating layer 22 laminated to the first organic insulating layer 21 in such a way as to embed the wires 13.
    Type: Application
    Filed: February 23, 2017
    Publication date: April 11, 2019
    Inventors: Kazuyuki MITSUKURA, Masaya TOBA, Yoshinori EJIRI, Kazuhiko KURAFUCHI