Patents by Inventor Masayoshi Kanazawa

Masayoshi Kanazawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140042578
    Abstract: A solid-state imaging device and one or more bare ICs disposed on a back face of a solid-state imaging apparatus. The bare ICs are sealed by a resin. A circuit board may be interposed between the solid-state imaging device and the bare ICs, or the solid-state imaging device and the ICs are directly bonded together. The IC chips may be disposed on the inner surface, mainly the ceiling surface, of a light-shielding case. The imaging apparatus may be within a package with a pinhole.
    Type: Application
    Filed: September 20, 2013
    Publication date: February 13, 2014
    Applicant: Sony Corporation
    Inventors: Yuichi Takagi, Masayoshi Kanazawa, Kazuhiko Ueda, Makoto Tsuchimochi, Shigeo Ikeda
  • Patent number: 8564702
    Abstract: At least a solid-state imaging device and one or a plurality of bare ICs that are disposed on the back face or on the back face side of the solid-state imaging apparatus and serve as peripheral circuits. The bare ICs are sealed by a resin. A circuit board may be interposed between the solid-state imaging device and the bare ICs, or the solid-state imaging device and the ICs are directly bonded together. According to another aspect, IC chips and other parts as peripheral circuits of a solid-state imaging device are disposed on the inner surface, mainly the ceiling surface, of a light-shielding case.
    Type: Grant
    Filed: August 19, 2011
    Date of Patent: October 22, 2013
    Assignee: Sony Corporation
    Inventors: Yuichi Takagi, Masayoshi Kanazawa, Kazuhiko Ueda, Makoto Tsuchimochi, Shigeo Ikeda
  • Publication number: 20120069230
    Abstract: At least a solid-state imaging device and one or a plurality of bare ICs that are disposed on the back face or on the back face side of the solid-state imaging apparatus and serve as peripheral circuits. The bare ICs are sealed by a resin. A circuit board may be interposed between the solid-state imaging device and the bare ICs, or the solid-state imaging device and the ICs are directly bonded together. According to another aspect, IC chips and other parts as peripheral circuits of a solid-state imaging device are disposed on the inner surface, mainly the ceiling surface, of a light-shielding case.
    Type: Application
    Filed: August 19, 2011
    Publication date: March 22, 2012
    Applicant: SONY CORPORATION
    Inventors: Yuichi Takagi, Masayoshi Kanazawa, Kazuhiko Ueda, Makoto Tsuchimochi, Shigeo Ikeda
  • Patent number: 8098309
    Abstract: At least a solid-state imaging device and one or a plurality of bare ICs that are disposed on the back face or on the back face side of the solid-state imaging apparatus and serve as peripheral circuits are provided. The bare ICs are sealed by a resin. A circuit board may be interposed between the solid-state imaging device and the bare ICs, or the solid-state imaging device and the ICs are directly bonded together. According to another aspect, IC chips and other parts as peripheral circuits of a solid-state imaging device are disposed on the inner surface, mainly the ceiling surface, of a light-shielding case.
    Type: Grant
    Filed: July 15, 2004
    Date of Patent: January 17, 2012
    Assignee: Sony Corporation
    Inventors: Yuichi Takagi, Masayoshi Kanazawa, Kazuhiko Ueda, Makoto Tsuchimochi, Shigeo Ikeda
  • Publication number: 20040263671
    Abstract: At least a solid-state imaging device and one or a plurality of bare ICs that are disposed on the back face or on the back face side of the solid-state imaging apparatus and serve as peripheral circuits are provided. The bare ICs are sealed by a resin. A circuit board may be interposed between the solid-state imaging device and the bare ICs, or the solid-state imaging device and the ICs are directly bonded together. According to another aspect, IC chips and other parts as peripheral circuits of a solid-state imaging device are disposed on the inner surface, mainly the ceiling surface, of a light-shielding case.
    Type: Application
    Filed: July 15, 2004
    Publication date: December 30, 2004
    Inventors: Yuichi Takagi, Masayoshi Kanazawa, Kazuhiko Ueda, Makoto Tsuchimochi, Shigeo Ikeda
  • Patent number: 6795120
    Abstract: At least a solid-state imaging device and one or a plurality of bare ICs that are disposed on the back face or on the back face side of the solid-state imaging apparatus and serve as peripheral circuits are provided. The bare ICs are sealed by a resin. A circuit board may be interposed between the solid-state imaging device and the bare ICs, or the solid-state imaging device and the ICs are directly bonded together. According to another aspect, IC chips and other parts as peripheral circuits of a solid-state imaging device are disposed on the inner surface, mainly the ceiling surface, of a light-shielding case.
    Type: Grant
    Filed: May 13, 1997
    Date of Patent: September 21, 2004
    Assignee: Sony Corporation
    Inventors: Yuichi Takagi, Masayoshi Kanazawa, Kazuhiko Ueda, Makoto Tsuchimochi, Shigeo Ikeda
  • Publication number: 20020044215
    Abstract: At least a solid-state imaging device and one or a plurality of bare ICs that are disposed on the back face or on the back face side of the solid-state imaging apparatus and serve as peripheral circuits are provided. The bare ICs are sealed by a resin. A circuit board may be interposed between the solid-state imaging device and the bare ICs, or the solid-state imaging device and the ICs are directly bonded together. According to another aspect, IC chips and other parts as peripheral circuits of a solid-state imaging device are disposed on the inner surface, mainly the ceiling surface, of a light-shielding case.
    Type: Application
    Filed: May 13, 1997
    Publication date: April 18, 2002
    Inventors: YUICHI TAKAGI, MASAYOSHI KANAZAWA, KAZUHIKO UEDA, MAKOTO TSUCHIMOCHI, SHIGEO IKEDA
  • Patent number: 6024088
    Abstract: A breath-synchronization control unit for a gas feeder, capable of reliably detecting inhalation and supplying a gas, which serves to control the gas feeder to supply a gas from a gas source in synchronization with the breath.
    Type: Grant
    Filed: June 12, 1997
    Date of Patent: February 15, 2000
    Assignees: Koike Medical Co., Ltd., Sumitomo Medical Mining Co., Ltd., Gunma Koike Co. Ltd.
    Inventors: Shiro Ishikawa, Masao Takahashi, Masayoshi Kanazawa, Eitaro Hayakawa, Yuki Murayama, Takashi Sato
  • Patent number: 4982247
    Abstract: A semiconductor device, such as a GaAs FET, has low-noise, ultra-high frequency operation. The semiconductor device has at least one bonding pad for applying potential to the gate electrode lying outside of the source region. In practice, one or more bonding pads are deposited in the general vicinity of the gate electrode and outside of the source region. This allows the number of supply points P to be increased without lengthening the source region and thus expanding the chip. With regard to the drain-gate capacitance, the bonding pad or pads can be surrounded by an electrode other than the drain region electrode or the gate electrode to ensure that the drain-gate capacitance is not increased.
    Type: Grant
    Filed: September 21, 1988
    Date of Patent: January 1, 1991
    Assignee: Sony Corporation
    Inventors: Tsuneyoshi Aoki, Masayoshi Kanazawa, Akiyasu Ishitani
  • Patent number: 3988761
    Abstract: A dual gate field-effect transistor with two diffusion regions of the same conductivity type and a semi-conductive layer of the opposite conductivity type. Each of the diffusion regions has a second diffusion region thereon of the opposite conductivity type diffused at least partly through the same mask to create narrow, controlled channels but with one of the upper diffused regions extending over the edge of the diffused regions below it. The other upper diffused region has an ohmic contact and serves as a source. Two other ohmic contacts are placed on the metal deposited on thin insulating layers directly over edge parts of the first diffused regions to serve as first and second gate electrodes. Another semi-conductive portion, which may be a diffused region of the other conductivity, has an ohmic contact and serves as a drain.
    Type: Grant
    Filed: January 29, 1973
    Date of Patent: October 26, 1976
    Assignee: Sony Corporation
    Inventor: Masayoshi Kanazawa