Patents by Inventor Masayoshi Kondo

Masayoshi Kondo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11971479
    Abstract: An ultrasonic sensor is provided with an ultrasonic element that converts between an electrical signal and an ultrasonic vibration and an element accommodating case having a bottomed cylindrical shape and accommodating the ultrasonic element inside thereof. The element accommodating case includes a side plate portion formed in a cylindrical shape that surrounds a directional center axis, and a bottom plate portion that closes one end side of the side plate portion in an axial direction which is parallel to the directional center axis. The ultrasonic element is attached to the bottom plate portion. The bottom plate portion includes at least one protrusion. The protrusions vibrate together with the bottom plate portion when the bottom plate portion vibrates as an ultrasonic vibration.
    Type: Grant
    Filed: November 4, 2021
    Date of Patent: April 30, 2024
    Assignee: DENSO CORPORATION
    Inventors: Masayoshi Satake, Youhei Suzuki, Kensuke Kobayashi, Dai Kondo, Syoya Ishida, Yudai Yamamoto, Kenji Fukabori
  • Patent number: 11972359
    Abstract: A user management method according to the present disclosure includes: storing (S101) appliance use information including: appliance identification information for identifying an appliance; user information for identifying a user of the appliance; and an operating state of the appliance when the appliance was used; analyzing (S102) the appliance use information stored in the storing (S101) to identify, from among a plurality of functions of the appliance, one or more first functions each having a use frequency less than or equal to a threshold value; and providing (S103) the user with a notice which prompts use of the one or more first functions identified in the analyzing (S102).
    Type: Grant
    Filed: July 23, 2019
    Date of Patent: April 30, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Kotaro Sakata, Tomoaki Maruyama, Kenji Kondo, Hiroaki Yamamoto, Masayoshi Tojima
  • Patent number: 10855910
    Abstract: An electronic device according to a first aspect comprises an imaging device and a processor. The imaging device has a predetermined imaging region, and is configured to capture images having different focal distances. The processor is configured to execute a first process of identifying two or more focus identification regions included in a first imaging region included in the predetermined imaging region by comparing the captured images in the first imaging region, and a second process of interpolating a focal distance of a middle region not belonging to the two or more focus identification regions in the first imaging region. The second process includes a process of interpolating the focal distance of the middle region based on a focal distance of an interpolation focus region that is located inside or outside the middle region and that is one of the two or more focus identification regions.
    Type: Grant
    Filed: August 26, 2019
    Date of Patent: December 1, 2020
    Assignee: KYOCERA Corporation
    Inventors: Masaki Tano, Masayoshi Kondo, Yusuke Suzuki, Masaya Kawakita, Seiji Yamada, Tomohiro Hamaguchi, Koji Saijo
  • Publication number: 20200068134
    Abstract: An electronic device according to a first aspect comprises an imaging device and a processor. The imaging device has a predetermined imaging region, and is configured to capture images having different focal distances. The processor is configured to execute a first process of identifying two or more focus identification regions included in a first imaging region included in the predetermined imaging region by comparing the captured images in the first imaging region, and a second process of interpolating a focal distance of a middle region not belonging to the two or more focus identification regions in the first imaging region. The second process includes a process of interpolating the focal distance of the middle region based on a focal distance of an interpolation focus region that is located inside or outside the middle region and that is one of the two or more focus identification regions.
    Type: Application
    Filed: August 26, 2019
    Publication date: February 27, 2020
    Applicant: KYOCERA Corporation
    Inventors: Masaki TANO, Masayoshi KONDO, Yusuke SUZUKI, Masaya KAWAKITA, Seiji YAMADA, Tomohiro HAMAGUCHI, Koji SAIJO
  • Patent number: 10397041
    Abstract: An electronic control unit provides a transmission node in a communication system in which the transmission node stores first data in a transmission frame having a predetermined format and transmits the first data to a network, and a reception node receives the first data as a reception frame via the network. The electronic control unit includes: an allocation unit that divides second data into a plurality of split data items, and allocates the split data items to an empty area of the transmission frame other than an area where the first data is allocated; and a transmission unit that transmits the spilt data items allocated by the allocation unit and the first data as the transmission frame.
    Type: Grant
    Filed: July 28, 2017
    Date of Patent: August 27, 2019
    Assignee: DENSO CORPORATION
    Inventors: Masayoshi Kondo, Satoshi Kanamaru
  • Publication number: 20180077002
    Abstract: An electronic control unit provides a transmission node in a communication system in which the transmission node stores first data in a transmission frame having a predetermined format and transmits the first data to a network, and a reception node receives the first data as a reception frame via the network. The electronic control unit includes: an allocation unit that divides second data into a plurality of split data items, and allocates the split data items to an empty area of the transmission frame other than an area where the first data is allocated; and a transmission unit that transmits the spilt data items allocated by the allocation unit and the first data as the transmission frame.
    Type: Application
    Filed: July 28, 2017
    Publication date: March 15, 2018
    Inventors: Masayoshi KONDO, Satoshi KANAMARU
  • Publication number: 20180034851
    Abstract: An electronic control apparatus includes a dummy data setting section and a transmission section. The dummy data setting section sets a dummy data in a free area of a format area that is previously defined. The electronic control apparatus configures a communication system as a transmission node and stores normal data in the format area. The free area is a rest of the format area after the transmission node stores the normal data in the format area. The communication system further includes a reception node. The transmission section transmits the normal data together with the dummy data to the reception node via a network. The reception node receives the normal data together with the dummy data via the network.
    Type: Application
    Filed: April 26, 2017
    Publication date: February 1, 2018
    Inventors: Satoshi KANAMARU, Masayoshi KONDO
  • Publication number: 20160062485
    Abstract: An electronic device capable of performing display control based on bending is provided. The electronic device has a display, a detecting unit, and a controller. The controller has flexibility. The detecting unit is able to detect bending of the display. In a case where bending is detected by the detecting unit, the controller performs display control based on the bending.
    Type: Application
    Filed: March 13, 2014
    Publication date: March 3, 2016
    Applicant: KYOCERA CORPORATION
    Inventor: Masayoshi KONDO
  • Patent number: 9002573
    Abstract: A VIN storage electronic control unit stores a vehicle identification number (VIN). A standby RAM that holds data constantly with an electric power supplied by a battery stores failure diagnosis related information and a rewriting history flag. When the VIN storage electronic control unit rewrites the VIN upon receiving a request signal for rewriting the VIN, the standby RAM updates the rewriting history flag so as to switch into a set status indicating the rewriting is made. When receiving a request signal for eliminating the failure diagnosis related information, the failure diagnosis related information stored in the standby RAM is reset and the rewriting history flag is switched into a reset status. In addition, while the rewriting history flag is in the set status, a malfunction indicator lamp is turned on.
    Type: Grant
    Filed: June 13, 2011
    Date of Patent: April 7, 2015
    Assignee: Denso Corporation
    Inventors: Yoshikuni Kawamura, Kokichi Shimizu, Kazunori Okada, Masayoshi Kondo
  • Patent number: 8748751
    Abstract: Disclosed is an electronic component package (100) including a circuit board (10), an electronic component (20), and an adhesive layer (30). The circuit board (10) is provided with an electrically-conductive conductor post (16) which is buried in a base member (12), and a solder layer (18) which is provided at the front end (13) of the conductor post (16) while exposed from a surface (121) of the base member (12). An electrode pad (24) having a metal layer (22) mounted thereon is provided on the main surface (26) of the electronic component (20). The adhesive layer (30) contains a flux activating compound, and bonds the surface (121) of the base member (12) and the main surface (26) of the electronic component (20). Then, the metal layer (22) and the solder layer (18) are metal-bonded.
    Type: Grant
    Filed: November 19, 2009
    Date of Patent: June 10, 2014
    Assignee: Sumitomo Bakelite Co., Ltd.
    Inventors: Toshiaki Chuma, Masayoshi Kondo, Satoshi Tanaka, Kenichi Kanemasa
  • Patent number: 8742568
    Abstract: A circuit board (1) exhibits an average coefficient of thermal expansion (A) of the first insulating layer (21) in the direction along the substrate surface in a temperature range from 25 degrees C. to its glass transition point of equal to or higher than 3 ppm/degrees C. and equal to or lower than 30 ppm/degrees C. Further, an average coefficient of thermal expansion (B) of the second insulating layer (23) in the direction along the substrate surface in a temperature range from 25 degrees C. to its glass transition point is equivalent to an average coefficient of thermal expansion (C) of the third insulating layer (25) in the direction along the substrate surface in a temperature range from 25 degrees C. to its glass transition point. (B) and (C) are larger than (A), and a difference between (A) and (B) and a difference between (A) and (C) are equal to or higher than 5 ppm/degrees C. and equal to or lower than 35 ppm/degrees C.
    Type: Grant
    Filed: February 24, 2011
    Date of Patent: June 3, 2014
    Assignee: Sumitomo Bakelite Company, Ltd.
    Inventors: Masayoshi Kondo, Natsuki Makino, Daisuke Fujiwara, Yuka Ito
  • Publication number: 20130347143
    Abstract: Provided is a method for producing lilies containing a blue pigment (delphinidin) in the petals thereof by introducing a foreign gene into lilies. The method pertaining to the present invention is a method for producing lilies containing delphinidin in the petals thereof, including the following steps: introducing, into a lily, a F3?5?H gene derived from a campanula and comprising a nucleotide sequence encoding a peptide having flavonoid 3?5?-hydroxylase (F3?5?H) activity, such as a nucleotide sequence represented by SEQ ID NO: 1 or SEQ ID NO: 11; while also introducing a F3?H gene fragment derived from a lily and comprising a nucleotide sequence encoding a peptide having flavonoid 3?-hydroxylase activity, such as a nucleotide sequence represented by SEQ ID NO: 3 or SEQ ID NO: 16; and inhibiting the expression of endogenous F3?H expression, which acts on cyanidin synthesis in lily petals, while the F3?5?H gene that has been introduced acts to cause the synthesis of delphinidin.
    Type: Application
    Filed: September 16, 2011
    Publication date: December 26, 2013
    Applicants: NIIGATA PREFECTURE, SUNTORY HOLDINGS LIMITED
    Inventors: Yoshikazu Tanaka, Noriko Nakamura, Hitoshi Kobayashi, Hiroaki Okuhara, Masayoshi Kondo, Yosuke Koike, Yosuke Hoshi, Toshikazu Nomizu
  • Publication number: 20130015582
    Abstract: A circuit board (1) exhibits an average coefficient of thermal expansion (A) of the first insulating layer (21) in the direction along the substrate surface in a temperature range from 25 degrees C. to its glass transition point of equal to or higher than 3 ppm/degrees C. and equal to or lower than 30 ppm/degrees C. Further, an average coefficient of thermal expansion (B) of the second insulating layer (23) in the direction along the substrate surface in a temperature range from 25 degrees C. to its glass transition point is equivalent to an average coefficient of thermal expansion (C) of the third insulating layer (25) in the direction along the substrate surface in a temperature range from 25 degrees C. to its glass transition point. (B) and (C) are larger than (A), and a difference between (A) and (B) and a difference between (A) and (C) are equal to or higher than 5 ppm/degrees C. and equal to or lower than 35 ppm/degrees C.
    Type: Application
    Filed: February 24, 2011
    Publication date: January 17, 2013
    Applicant: SUMITOMO BAKELITE CO., LTD.
    Inventors: Masayoshi Kondo, Natsuki Makino, Daisuke Fujiwara, Yuka Ito
  • Patent number: 8153901
    Abstract: A multilayer circuit board is fabricated by: preparing a film comprising a first protective film and a first interlayer adhesive; preparing a first circuit board having a first base and a conductive post protruding therefrom; stacking the first interlayer adhesive and the conductive post together; peeling off the first protective film; preparing a second circuit board including a conductive pad receiving the conductive post; and bonding the first circuit board and the second circuit board through the first interlayer adhesive so that the conductive post and the conductive pad face each other, wherein the first interlayer adhesive 104 at the top portion of the conductive post is selectively removed while peeling off the first protective film.
    Type: Grant
    Filed: October 30, 2006
    Date of Patent: April 10, 2012
    Assignee: Sumitomo Bakelite Co., Ltd.
    Inventor: Masayoshi Kondo
  • Publication number: 20110304448
    Abstract: A VIN storage electronic control unit stores a vehicle identification number (VIN). A standby RAM that holds data constantly with an electric power supplied by a battery stores failure diagnosis related information and a rewriting history flag. When the VIN storage electronic control unit rewrites the VIN upon receiving a request signal for rewriting the VIN, the standby RAM updates the rewriting history flag so as to switch into a set status indicating the rewriting is made. When receiving a request signal for eliminating the failure diagnosis related information, the failure diagnosis related information stored in the standby RAM is reset and the rewriting history flag is switched into a reset status. In addition, while the rewriting history flag is in the set status, a malfunction indicator lamp is turned on.
    Type: Application
    Filed: June 13, 2011
    Publication date: December 15, 2011
    Applicant: DENSO CORPORATION
    Inventors: Yoshikuni Kawamura, Kokichi Shimizu, Kazunori Okada, Masayoshi Kondo
  • Patent number: 8042263
    Abstract: According to the present invention, there is provided a process for manufacturing a circuit board wherein a first substrate having a conductor post and a second substrate having a conductor pad for receiving the conductor post are laminated through an interlayer adhesive, and the conductor post and the conductor pad are electrically connected, comprising, as a first step, bonding the conductor pad with the conductor post by thermocompression under predetermined first conditions while the first and the second substrates are arranged such that the conductor pad faces the conductor post through the interlayer adhesive; thermocompressing the first substrate and the second substrate under predetermined second conditions while the conductor pad is bonded with the conductor post; and thermocompressing the first substrate and the second substrate under predetermined third conditions while the conductor pad is bonded with the conductor post, wherein the first, the second and the third conditions are different from eac
    Type: Grant
    Filed: February 8, 2007
    Date of Patent: October 25, 2011
    Assignee: Sumitomo Bakelite Co., Ltd.
    Inventors: Masayoshi Kondo, Toshio Komiyatani
  • Publication number: 20110226513
    Abstract: Disclosed is an electronic component package 100 including a circuit board 10, an electronic component 20, and an adhesive layer 30. The circuit board 10 is provided with an electrically-conductive conductor post 16 which is buried in a base member 12, and a solder layer 18 which is provided at the front end 13 of the conductor post 16 while exposed from a surface 121 of the base member 12. An electrode pad 24 having a metal layer 22 mounted thereon is provided on the main surface 26 of the electronic component 20. The adhesive layer 30 contains a flux activating compound, and bonds the surface 121 of the base member 12 and the main surface 26 of the electronic component 20. Then, the metal layer 22 and the solder layer 18 are metal-bonded.
    Type: Application
    Filed: November 19, 2009
    Publication date: September 22, 2011
    Inventors: Toshiaki Chuma, Masayoshi Kondo, Satoshi Tanaka, Kenichi Kanemasa
  • Publication number: 20110120754
    Abstract: A multilayer wiring board includes: a rigid portion including a first base member having flexibility and surfaces, the first base member having a first insulating layer and a first conductor layer, and a second base member bonded on at least one of the surfaces of the first base member and having rigidity higher than that of the first base member, the second base member having a second insulating layer and a second conductor layer; and a flexible portion provided so as to be continuously extended from the rigid portion, the flexible portion constituted from the first base member, wherein in the case where a coefficient of thermal expansion of the second insulating layer is measured by a thermal mechanical analysis based on JIS C 6481 at a predetermined temperature, the coefficient of thermal expansion of the second insulating layer in a plane direction thereof is 13 ppm/° C. or lower and the coefficient of thermal expansion of the second insulating layer in a thickness direction thereof is 20 ppm/° C.
    Type: Application
    Filed: September 13, 2007
    Publication date: May 26, 2011
    Applicant: SUMITOMO BAKELITE COMPANY LIMITED
    Inventors: Masayoshi Kondo, Masaaki Kato, Toshiaki Chuma, Toshio Komiyatani, Takahisa Iida, Kenichi Kanemasa
  • Publication number: 20110031000
    Abstract: There is disclosed a resin composition used for forming a resin layer in a sheet-formed carrier material with a resin, comprising a polyfunctional epoxy resin (a) having three or more glycidyl ether groups with an epoxy equivalent of 100 to 300, a compound (b) having one or more carboxyl groups with a melting point of equal to or more than 50 degrees C. and equal to or less than 230 degrees C., and a curing agent (c).
    Type: Application
    Filed: March 24, 2009
    Publication date: February 10, 2011
    Applicant: SUMITOMO BAKELITE CO., LTD.
    Inventors: Toshio Komiyatani, Masayoshi Kondo
  • Publication number: 20100326712
    Abstract: There are provided a circuit board, which has little outflow of an interlayer adhesive to be used for a multilayer lamination while keeping a connection reliability, and a method for manufacturing the circuit board. The circuit board (68) is characterized in that a first substrate (16) having a first base (12) and a conductor post (45) composed of a protrusion (14) projecting from the first base (12) and a metallic cover layer (15) covering the protrusion (14), and a second substrate (18) having a second base (19) and a conductor circuit (17) are laminated and adhered through an interlayer adhesive (13) and are alloyed at a bonding face (43) between the metallic cover layer (15) and the conductor circuit (17), and in that the cross-section, as viewed in the cross-section of the bonding face (43), of the metallic cover layer (15) has a shape which becomes wider from the bonding face (43) of the conductor circuit (17) toward the first substrate (16).
    Type: Application
    Filed: February 20, 2009
    Publication date: December 30, 2010
    Applicant: SUMITOMO BAKELITE CO., LTD.
    Inventors: Masayoshi Kondo, Toshio Komiyatani