Abstract: There is provided a semiconductor device having a structure that can suppress occurrence of chipping in a device region and that can reduce manufacturing cost of the semiconductor device. A semiconductor device includes a substrate and a first amorphous insulating film. The substrate has a main surface and an end surface. The main surface includes a peripheral region and a device region. The first amorphous insulating film is disposed on the peripheral region, and is separated from the device region. The first amorphous insulating film extends along the end surface in the form of a stripe. The first amorphous insulating film is flush with the end surface.

Abstract: An RC-IGBT includes a first electrode disposed on a first main surface of a semiconductor substrate over a transistor region and a diode region. The semiconductor substrate includes a MOS gate structure on a first main surface side in the transistor region. The RC-IGBT includes: an interlayer dielectric covering a gate electrode of the MOS gate structure, and having a contact hole exposing a semiconductor layer; and a barrier metal disposed in the contact hole. The first electrode enters the contact hole, is in contact with the semiconductor layer of the MOS gate structure through the barrier metal, and is in direct contact with a semiconductor layer in the diode region of the semiconductor substrate.

Abstract: There is provided a semiconductor device having a structure that can suppress occurrence of chipping in a device region and that can reduce manufacturing cost of the semiconductor device. A semiconductor device includes a substrate and a first amorphous insulating film. The substrate has a main surface and an end surface. The main surface includes a peripheral region and a device region. The first amorphous insulating film is disposed on the peripheral region, and is separated from the device region. The first amorphous insulating film extends along the end surface in the form of a stripe. The first amorphous insulating film is flush with the end surface.

Abstract: There is provided a semiconductor device having a structure that can suppress occurrence of chipping in a device region and that can reduce manufacturing cost of the semiconductor device. A semiconductor device includes a substrate and a first amorphous insulating film. The substrate has a main surface and an end surface. The main surface includes a peripheral region and a device region. The first amorphous insulating film is disposed on the peripheral region, and is separated from the device region. The first amorphous insulating film extends along the end surface in the form of a stripe. The first amorphous insulating film is flush with the end surface.

Abstract: There is provided a semiconductor device having a structure that can suppress occurrence of chipping in a device region and that can reduce manufacturing cost of the semiconductor device. A semiconductor device includes a substrate and a first amorphous insulating film. The substrate has a main surface and an end surface. The main surface includes a peripheral region and a device region. The first amorphous insulating film is disposed on the peripheral region, and is separated from the device region. The first amorphous insulating film extends along the end surface in the form of a stripe. The first amorphous insulating film is flush with the end surface.

Abstract: An RC-IGBT includes a first electrode disposed on a first main surface of a semiconductor substrate over a transistor region and a diode region. The semiconductor substrate includes a MOS gate structure on a first main surface side in the transistor region. The RC-IGBT includes: an interlayer dielectric covering a gate electrode of the MOS gate structure, and having a contact hole exposing a semiconductor layer; and a barrier metal disposed in the contact hole. The first electrode enters the contact hole, is in contact with the semiconductor layer of the MOS gate structure through the barrier metal, and is in direct contact with a semiconductor layer in the diode region of the semiconductor substrate.

Abstract: An RC-IGBT includes a first electrode disposed on a first main surface of a semiconductor substrate over a transistor region and a diode region. The semiconductor substrate includes a MOS gate structure on a first main surface side in the transistor region. The RC-IGBT includes: an interlayer dielectric covering a gate electrode of the MOS gate structure, and having a contact hole exposing a semiconductor layer; and a barrier metal disposed in the contact hole. The first electrode enters the contact hole, is in contact with the semiconductor layer of the MOS gate structure through the barrier metal, and is in direct contact with a semiconductor layer in the diode region of the semiconductor substrate.

Abstract: An aluminum electrode (2) is provided on a semiconductor device (1). A metallic film (3) for a solder joint is provided on the aluminum electrode (2). The organic protective film (4) is apart from the metallic film (3). An interval between the organic protective film (4) and the metallic film (3) is equal to or greater than half of a thickness of the organic protective film (4). Thus, even when the organic protective film (4) is deformed during sinter joining, the stress is not transmitted to the metallic film (3). Therefore, it is possible to prevent the solder connection metallic film (3) from cracking.

Abstract: An RC-IGBT includes a first electrode disposed on a first main surface of a semiconductor substrate over a transistor region and a diode region. The semiconductor substrate includes a MOS gate structure on a first main surface side in the transistor region. The RC-IGBT includes: an interlayer dielectric covering a gate electrode of the MOS gate structure, and having a contact hole exposing a semiconductor layer; and a barrier metal disposed in the contact hole. The first electrode enters the contact hole, is in contact with the semiconductor layer of the MOS gate structure through the barrier metal, and is in direct contact with a semiconductor layer in the diode region of the semiconductor substrate.

Abstract: There is provided a semiconductor device having a structure that can suppress occurrence of chipping in a device region and that can reduce manufacturing cost of the semiconductor device. A semiconductor device includes a substrate and a first amorphous insulating film. The substrate has a main surface and an end surface. The main surface includes a peripheral region and a device region. The first amorphous insulating film is disposed on the peripheral region, and is separated from the device region. The first amorphous insulating film extends along the end surface in the form of a stripe. The first amorphous insulating film is flush with the end surface.

Abstract: Included are a semiconductor substrate, an emitter electrode formed on the semiconductor substrate, a gate electrode formed on the semiconductor substrate, a source layer of a first conductivity type formed on the semiconductor substrate, a base layer of a second conductivity type formed on the semiconductor substrate, a collector electrode formed under the semiconductor substrate, a plurality of active trench gates formed on a top-surface side of the semiconductor substrate and connected to the gate electrode, and a plurality of dummy trench gates formed on the top-surface side of the semiconductor substrate and not connected to the gate electrode. First structures, each including three or more of the active trench gates arranged side by side, and second structures, each including three or more of the dummy trench gates arranged side by side, are alternately provided.

Abstract: An aluminum electrode (2) is provided on a semiconductor device (1). A metallic film (3) for a solder joint is provided on the aluminum electrode (2). The organic protective film (4) is apart from the metallic film (3). An interval between the organic protective film (4) and the metallic film (3) is equal to or greater than half of a thickness of the organic protective film (4). Thus, even when the organic protective film (4) is deformed during sinter joining, the stress is not transmitted to the metallic film (3). Therefore, it is possible to prevent the solder connection metallic film (3) from cracking.

Abstract: A semiconductor device of the present invention includes a semiconductor element, a surface electrode formed on a surface of the semiconductor element, a metal film formed on the surface electrode so as to have a joining portion and a stress relieving portion formed so as to border on and surround the joining portion, solder joined to the joining portion while avoiding the stress relieving portion, and an external electrode joined to the joining portion through the solder.

Abstract: According to a first aspect of the present invention, a method of manufacturing semiconductor device includes the step of preparing a silicon substrate. The silicon substrate includes an N-type silicon layer on one surface and at least one of a PN junction, an electrode film, and a protective film on another surface. The method includes the steps of forming a Si—Ti junction by forming a first electrode film made of titanium on the N-type silicon layer; forming a second electrode film made of Al—Si on the first electrode film; forming a third electrode film made of Ni on the second electrode film; and heating the silicon substrate after forming the third electrode film. A titanium silicide layer is not formed between the N-type silicon layer and the first electrode film.

Abstract: A semiconductor device of the present invention includes a semiconductor element, a surface electrode formed on a surface of the semiconductor element, a metal film formed on the surface electrode so as to have a joining portion and a stress relieving portion formed so as to border on and surround the joining portion, solder joined to the joining portion while avoiding the stress relieving portion, and an external electrode joined to the joining portion through the solder.

Abstract: A semiconductor device of the present invention includes a semiconductor element, a surface electrode formed on a surface of the semiconductor element, a metal film formed on the surface electrode so as to have a joining portion and a stress relieving portion formed so as to border on and surround the joining portion, solder joined to the joining portion while avoiding the stress relieving portion, and an external electrode joined to the joining portion through the solder.

Abstract: The semiconductor element has an electrode including: a Ni-inclusion metal layer containing nickel formed on a side of at least one surface of the semiconductor-element constituting part; a Ni-barrier metal layer formed outwardly on a side of the Ni-inclusion metal layer opposite to the side toward the semiconductor-element constituting part; and a surface metal layer outwardly formed on a side of the Ni-barrier metal layer opposite to the side toward the semiconductor-element constituting part, to be connected to the metal nanoparticles sintered layer; wherein the Ni-barrier metal layer contains a metal for suppressing diffusion of nickel toward the surface metal layer.

Abstract: According to a first aspect of the present invention, a method of manufacturing semiconductor device includes the step of preparing a silicon substrate. The silicon substrate includes an N-type silicon layer on one surface and at least one of a PN junction, an electrode film, and a protective film on another surface. The method includes the steps of forming a Si—Ti junction by forming a first electrode film made of titanium on the N-type silicon layer; forming a second electrode film made of Al—Si on the first electrode film; forming a third electrode film made of Ni on the second electrode film; and heating the silicon substrate after forming the third electrode film. A titanium silicide layer is not formed between the N-type silicon layer and the first electrode film.

Abstract: A semiconductor device of the present invention includes a semiconductor element, a surface electrode formed on a surface of the semiconductor element, a metal film formed on the surface electrode so as to have a joining portion and a stress relieving portion formed so as to border on and surround the joining portion, solder joined to the joining portion while avoiding the stress relieving portion, and an external electrode joined to the joining portion through the solder.

Abstract: A semiconductor device capable of suppressing time variation of a threshold voltage and a method of manufacturing the same. A semiconductor device according to the present invention comprises a drift layer formed on a semiconductor substrate, first well regions formed in a surface layer of the drift layer, being apart from one another, a gate insulating film formed, extending on the drift layer and each of the first well regions, a gate electrode selectively formed on the gate insulating film, a source contact hole penetrating through the gate insulating film and reaching the inside of each of the first well regions, and a residual compressive stress layer formed on at least a side surface of the source contact hole, in which a compressive stress remains.