Patents by Inventor Masayoshi Umeno

Masayoshi Umeno has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040231718
    Abstract: Disclosed is a solar cell for use in space, comprising compound semiconductors used as photovoltaic conversion material. The solar cell comprises a cover glass used for improving the radiation tolerance as a substrate for thin film deposition. The solar cell further comprises a crystalline thin film of the compound semiconductors directly formed on a surface of the cover glass for acting as the photovoltaic conversion material. The crystalline thin film of compound semiconductors is formed using a metal organic chemical vapor deposition system.
    Type: Application
    Filed: June 15, 2004
    Publication date: November 25, 2004
    Inventors: Masayoshi Umeno, Tetsuo Soga, Mitsuru Imaizumi
  • Publication number: 20020139417
    Abstract: Disclosed is a solar cell for use in space, comprising compound semiconductors used as photovoltaic conversion material. The solar cell comprises a cover glass used for improving the radiation tolerance as a substrare for thin film deposition. The solar cell further comprises a crystalline thin film of the compound semiconductors directly formed on a surface of the cover glass for acting as the photovoltaic conversion material. The crystalline thin film of compound semiconductors is formed using a metal organic chemical vapor deposition system.
    Type: Application
    Filed: March 25, 2002
    Publication date: October 3, 2002
    Inventors: Masayoshi Umeno, Tetsuo Soga, Mitsuru Imaizumi
  • Patent number: 5256594
    Abstract: A process for forming GaAs on a silicon substrate with very low levels of unintended silicon doping. First, a dielectric layer of silicon dioxide, silicon nitride, or both is grown or deposited on the substrate. Next, a window is opened in the dielectric layer exposing the silicon substrate in the regions in which the GaAs is to be formed. The GaAs layer is then formed on the substrate using conventional techniques with the gas phase transfer of silicon contamination from the edges and back of the silicon substrate to the GaAs region inhibited by the dielectric layer or layers.
    Type: Grant
    Filed: June 16, 1989
    Date of Patent: October 26, 1993
    Assignee: Intel Corporation
    Inventors: Albert T. Wu, Shinji Nozaki, Thomas George, Sandra S. Lee, Masayoshi Umeno
  • Patent number: 4963508
    Abstract: A semiconductor wafer having an epitaxial GaAs layer, including a monocrystalline Si substrate having a major surface which is inclined at an off angle between 0.5.degree. and 5.degree. with respect to (100); and at least one intermediate layer epitaxially grown on the major surface of the monocrystalline Si substrate, as a buffer layer for accommodating a lattice mismatch between the Si substrate and the epitaxial GaAs layer which is epitaxially grown on a major surface of the top layer of the at least one intermediate layer. The at least one intermediate layer may comprise one or mor GaP/GaAsP, GaAsP/GaAs superlattice layers. the wafer may be used to produce a seimconductor light emitting element which has a plurality of crystalline gaAs layers including a light emitting layer epitaxially grown on the GaAs layer on the intermediate layer.
    Type: Grant
    Filed: February 22, 1990
    Date of Patent: October 16, 1990
    Assignees: Daido Tokushuko Kabushiki Kaisha, Nagoya Institute of Technology
    Inventors: Masayoshi Umeno, Shiro Sakai, Shinichiro Yahagi
  • Patent number: 4928154
    Abstract: A semiconductor wafer having an epitaxial GaAs layer, including a monocrystalline Si substrate having a major surface which is inclined at an off angle between 0.5.degree. and 5.degree. with respect to (100); and at least one intermediate layer epitaxially grown on the major surface of the monocrystalline Si substrate, as a buffer layer for accommodating a lattice mismatch between the Si substrate and the epitaxial GaAs layer which is epitaxially grown on a major surface of a top layer of the at least one intermediate layer. The at least one intermediate layer may comprise one or more GaP/GaAsP, GaAsP/GaAs superlattice layers. The wafer may be used to produce a semiconductor light emitting element which has a plurality of crystalline GaAs layers including a light emitting layer epitaxially grown on the GaAs layer on the intermediate layer.
    Type: Grant
    Filed: March 20, 1989
    Date of Patent: May 22, 1990
    Assignees: Daido Tokushuko Kabushiki Kaisha, Nagoya Institute of Technology
    Inventors: Masayoshi Umeno, Shiro Sakai, Shinichiro Yahagi
  • Patent number: 4789421
    Abstract: A GaAs growth crystal comprises a Si substrate, an intermediate layer formed on the substrate and a GaAs layer grown on the intermediate layer. The intermediate layer includes constituent GaP/GaAsP and GaAsP/GaAs superlattice layers and additionally AlP and AlGaP thin films.
    Type: Grant
    Filed: September 27, 1985
    Date of Patent: December 6, 1988
    Assignee: Daidotokushuko Kabushikikaisha
    Inventors: Masayoshi Umeno, Shiro Sakai, Tetsuo Soga
  • Patent number: 4673391
    Abstract: A micropump disposed within a human body for continuously delivering small quantities of a pharmaceutical liquid stored therein to be injected in a human body, wherein the delivery rate is controlled by the action of a pharmaceutical liquid injection control device in response to external electric signals.
    Type: Grant
    Filed: May 30, 1984
    Date of Patent: June 16, 1987
    Assignee: Koichi Sakurai
    Inventors: Tatsuhei Kondo, Kaname Ito, Shoichiro Ikeda, Masayoshi Umeno, Kenji Ichikawa