Patents by Inventor Masayoshi Yagyuu

Masayoshi Yagyuu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Input buffer circuit and logic circuit using the buffer circuit
    Patent number: 4725744
    Abstract: A logic circuit including an input transistor receiving the input signal at its emitter, an output transistor in emitter-follower configuration receiving the signal from the collector of the input transistor, a voltage dividing resistor pair connected to the collector of the input transistor, and a feedback circuit conducting the signal produced by the voltage dividing resistor pair back to the base of the input transistor, the output signal being produced at the emitter of the output transistor.
    Type: Grant
    Filed: May 21, 1985
    Date of Patent: February 16, 1988
    Assignee: Hitachi, Ltd.
    Inventors: Masayoshi Yagyuu, Hiroyuki Itoh, Akira Masaki
  • High-speed logic circuit with a constant current source arrangement
    Patent number: 4609837
    Abstract: A high-speed logic circuit including a logic part formed of a differential transistor circuit and a feedback part for feeding the in-phase output of the differential transistor circuit back to the out-of-phase input terminal of the differential transistor circuit is disclosed in which a constant current source circuit is provided in the feedback part to keep constant a current flowing through the feedback part.
    Type: Grant
    Filed: November 1, 1983
    Date of Patent: September 2, 1986
    Assignee: Hitachi, Ltd.
    Inventors: Masayoshi Yagyuu, Hiroyuki Ito