Abstract: An imaging element is formed on the first main surface of a semiconductor substrate. An external terminal is formed on the second main surface of the semiconductor substrate. A through-hole electrode is formed in a through hole formed in the semiconductor substrate. A first electrode pad is formed on the through-hole electrode in the first main surface. An interlayer insulating film is formed on the first electrode pad and on the first main surface. A second electrode pad is formed on the interlayer insulating film. A passivation film is formed on the second electrode pad and the interlayer insulating film, and has an opening which exposes a portion of the second electrode pad. A contact plug is formed between the first and second electrode pads in a region which does not overlap the opening when viewed in a direction perpendicular to the surface of the semiconductor substrate.

Abstract: An imaging element is formed on the first main surface of a semiconductor substrate. An external terminal is formed on the second main surface of the semiconductor substrate. A through-hole electrode is formed in a through hole formed in the semiconductor substrate. A first electrode pad is formed on the through-hole electrode in the first main surface. An interlayer insulating film is formed on the first electrode pad and on the first main surface. A second electrode pad is formed on the interlayer insulating film. A passivation film is formed on the second electrode pad and the interlayer insulating film, and has an opening which exposes a portion of the second electrode pad. A contact plug is formed between the first and second electrode pads in a region which does not overlap the opening when viewed in a direction perpendicular to the surface of the semiconductor substrate.

Abstract: A solid state imaging device includes a substrate of a first conductivity type. A transistor, which includes a first gate electrode and a first and second impurity areas, is provided on a surface of the substrate. The first and second impurity areas are formed in the surface of the substrate and sandwich a region under the first gate electrode. A third impurity area of a second conductivity type is formed in the surface of the substrate and spaced from the second impurity area at an opposite side to the first gate electrode. A fourth impurity area is formed under the second impurity area and connected to the third impurity area. A second gate electrode is provided above the substrate. A fifth impurity area of the second conductivity type is formed in the surface of the substrate. The third and fifth impurity areas sandwich a region under the second gate electrode.

Abstract: A solid state imaging device includes a substrate of a first conductivity type. A transistor, which includes a first gate electrode and a first and second impurity areas, is provided on a surface of the substrate. The first and second impurity areas are formed in the surface of the substrate and sandwich a region under the first gate electrode. A third impurity area of a second conductivity type is formed in the surface of the substrate and spaced from the second impurity area at an opposite side to the first gate electrode. A fourth impurity area is formed under the second impurity area and connected to the third impurity area. A second gate electrode is provided above the substrate. A fifth impurity area of the second conductivity type is formed in the surface of the substrate. The third and fifth impurity areas sandwich a region under the second gate electrode.

Abstract: A solid-state imaging device comprises: unit cells in matrix where rows and columns of them are arranged in an upper surface of a semiconductor substrate, each of the unit cells including a photodiode that develops a certain level of signal charge in response to an amount of incident light and accumulates the signal charge, and a readout circuit for reading the signal charge from the photodiode, interlayer films laid over the semiconductor substrate and having wiring layers provided therein, light shield film formed over the interlayer films and having an aperture provided right above the photodiode in each of the unit cells, trains of first light shield upright barrier walls located in a space between two adjacent unit cells arranged in the same column, and trains of second light shield upright barrier walls located in a space between the adjacent unit cells in the same row, the first and second light shield upright barrier walls being embedded in the interlayer films between the semiconductor substrate and

Abstract: A method of manufacturing a semiconductor integrated circuit (IC) includes the steps of forming a polycrystalline silicon layer containing impurities on a semiconductor substrate; forming an oxidation-resistant insulating layer on the polycrystalline silicon layer; simultaneously forming resist patterns for forming a capacitor element and a resistor element on the oxidation-resistant insulating layer; and patterning the oxidation-resistant insulating layer and the polycrystalline silicon layer in sequence using resist patterns.