Abstract: In an integrated circuit board, a plurality of integrated circuits to be checked are connected together in a star shape. Operation clock data for JTAG of each integrated circuit and check data for checking each integrated circuit are stored. When an integrated circuit to be checked is specified, operation clock data for JTAG and check data for the specified integrated circuit are determined. With an operation clock for JTAG according to the determined operation clock data for JTAG, the determined check data is input to the specified integrated circuit. Based on the check data and output data output from the integrated circuit to which this check data is input, the integrated circuit board determines a malfunction in the integrated circuit, and then stores the determination result in a storage device.

Abstract: In an integrated circuit board, a plurality of integrated circuits to be checked are connected together in a star shape. Operation clock data for JTAG of each integrated circuit and check data for checking each integrated circuit are stored. When an integrated circuit to be checked is specified, operation clock data for JTAG and check data for the specified integrated circuit are determined. With an operation clock for JTAG according to the determined operation clock data for JTAG, the determined check data is input to the specified integrated circuit. Based on the check data and output data output from the integrated circuit to which this check data is input, the integrated circuit board determines a malfunction in the integrated circuit, and then stores the determination result in a storage device.

Abstract: A data transferring unit performs hit determination on a cache memory based on a management table and a request from a CPU board. If requested data is not available in the cache memory, the data transferring unit reads and sequentially transfers the requested data from a shared memory in packets of optimum packet length stored in a time table in such a way that the previous packet is transferred while the next packet is read. In addition, the data transferring unit measures a packet transfer time. A packet-length optimizing unit varies, based on the packet transfer time calculated by the data transferring unit and data stored in the time table, an optimum packet length so that the difference between the packet transfer time and a packet read time is minimized.

Abstract: A buffer has a capacity of an integral multiple of the number of transferred bits (i.e., the number of data bits transferred at electrically the same timing) between the buffer and a recording medium and between the buffer and a controller. Data transfer is performed between the buffer and the recording medium and between the controller and the buffer by the number of transferred bits in parallel. The number of data outputs (inputs) at the buffer is counted. When the count reaches a number obtained by division of one sector by the number of transferred bits, the output (input) of one-sector data to the recording medium is counted. The counted number of sectors and the number of sectors input (output) from the buffer to the recording medium are compared, and it is determined whether the data transfer is performed correctly.

Abstract: A method of transferring data from a source device to a destination device via a source-control device connected to the source device and a destination-control device connected to the destination device includes the steps of transmitting a data-transfer-request signal from the source device to the source-control device, transmitting a data-transfer-acknowledge signal from the source-control device to the source device in response to the data-transfer-request signal, and transmitting a data-transfer-request signal from the source-control device to the destination-control device concurrently with the transmission of the data-transfer-acknowledge signal.