Patents by Inventor Masayuki Hirayama

Masayuki Hirayama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10355574
    Abstract: This disclosure discloses a linear motor including a stator, a mover, and a plurality of teeth. The stator includes a stator curved part having an arc shape in a longitudinal direction. The mover is arranged facing the stator and is moved in the longitudinal direction of the stator. The plurality of teeth are arranged in parallel along the longitudinal direction so that a pitch of the teeth at an outer-peripheral side is larger than the pitch of the teeth at an inner-peripheral side on the stator curved part.
    Type: Grant
    Filed: June 3, 2016
    Date of Patent: July 16, 2019
    Inventors: Shogo Makino, Toru Shikayama, Masanobu Kakihara, Masayuki Hirayama, Haruki Yahara
  • Patent number: 9824806
    Abstract: A coil includes a wound body and a resin covering. The wound body is configured by winding a conductor. The wound body is pressure-molded. The resin covering covers a surface of the wound body.
    Type: Grant
    Filed: January 16, 2015
    Date of Patent: November 21, 2017
    Assignee: KABUSHIKI KAISHA YASKAWA DENKI
    Inventors: Tsuyoshi Nonaka, Masayuki Hirayama, Haruki Yahara
  • Publication number: 20160359402
    Abstract: This disclosure discloses a linear motor including a stator, a mover, and a plurality of teeth. The stator includes a stator curved part having an arc shape in a longitudinal direction. The mover is arranged facing the stator and is moved in the longitudinal direction of the stator. The plurality of teeth are arranged in parallel along the longitudinal direction so that a pitch of the teeth at an outer-peripheral side is larger than the pitch of the teeth at an inner-peripheral side on the stator curved part.
    Type: Application
    Filed: June 3, 2016
    Publication date: December 8, 2016
    Applicant: KABUSHIKI KAISHA YASKAWA DENKI
    Inventors: Shogo MAKINO, Toru SHIKAYAMA, Masanobu KAKIHARA, Masayuki HIRAYAMA, Haruki YAHARA
  • Publication number: 20150123509
    Abstract: A coil includes a wound body and a resin covering. The wound body is configured by winding a conductor. The wound body is pressure-moulded. The resin covering covers a surface of the wound body.
    Type: Application
    Filed: January 16, 2015
    Publication date: May 7, 2015
    Applicant: KABUSHIKI KAISHA YASKAWA DENKI
    Inventors: Tsuyoshi NONAKA, Masayuki HIRAYAMA, Haruki YAHARA
  • Patent number: 7616516
    Abstract: A semiconductor device of the present invention has a memory cell array having plural CMOS static memory cells provided at intersecting portions of plural word lines and plural complementary bit lines. In the memory cell array, a switch MOSFET which is in an OFF state in a first operation mode and in an ON state in a second operation mode different from the first operation mode and first-conductivity-type and second-conductivity-type MOSFETs having a diode configuration are provided in parallel between a first source line to which sources of first-conductivity-type MOSFETs constituting first and second CMOS inverter circuits constituting the plural static memory cells are connected and a first power supply line corresponding to the first source line. A second source line to which sources of the second conductivity-type MOSFETs constituting the first and second CMOS inverter circuits are connected is connected to the second power supply line corresponding thereto.
    Type: Grant
    Filed: April 24, 2008
    Date of Patent: November 10, 2009
    Assignee: Hitachi ULSI Systems Co., Ltd
    Inventors: Masayuki Hirayama, Masami Hasegawa, Michitaro Kanamitsu, Yayoi Hayashi, Naoyuki Anan
  • Publication number: 20080266937
    Abstract: A semiconductor device of the present invention has a memory cell array having plural CMOS static memory cells provided at intersecting portions of plural word lines and plural complementary bit lines. In the memory cell array, a switch MOSFET which is in an OFF state in a first operation mode and in an ON state in a second operation mode different from the first operation mode and first-conductivity-type and second-conductivity-type MOSFETs having a diode configuration are provided in parallel between a first source line to which sources of first-conductivity-type MOSFETs constituting first and second CMOS inverter circuits constituting the plural static memory cells are connected and a first power supply line corresponding to the first source line. A second source line to which sources of the second conductivity-type MOSFETs constituting the first and second CMOS inverter circuits are connected is connected to the second power supply line corresponding thereto.
    Type: Application
    Filed: April 24, 2008
    Publication date: October 30, 2008
    Inventors: Masayuki HIRAYAMA, Masami Hasegawa, Michitaro Kanamitsu, Yayoi Hayashi, Naoyuki Anan
  • Patent number: 7050942
    Abstract: An object state classification method includes a step of designating a to-be-determined object that is to be determined, and a state of the to-be-determined object, a step of creating a method set including, as elements, methods called from the designated state of the to-be-determined object, a step of using, as a to-be-determined state, the designated state of the to-be-determined object or another state obtained by calling methods from the designated state, and executing a program for calling methods included in the method set from the to-be-determined state, a step of recording an execution result in a case of calling the methods, and a step of creating a pseudo-state by merging a method group that is the elements of the method set, and the execution result in the case of calling each method of the method group, in association with the to-be-determined state of the to-be-determined object.
    Type: Grant
    Filed: December 17, 2003
    Date of Patent: May 23, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masayuki Hirayama, Katsuhiko Ueki, Wataru Okamoto
  • Patent number: 6865508
    Abstract: One of log analysis methods of the present invention includes the step of executing a program a plurality of times; executing a program a plurality of times; the step of generating a plurality of logs, each log being recorded a plurality of events occurring upon the execution of the program according to an occurrence order of each of the events in each of the logs; the step of performing a first calculation to calculate an event occurrence probability, for the occurrence order of each event, based on at least one from the program description concerning each event recorded in the logs and the data to be used upon the execution of the program description; and the step of outputting information concerning an event which corresponds to a characteristic included in the logs, based on the event occurrence probability.
    Type: Grant
    Filed: December 27, 2002
    Date of Patent: March 8, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Katsuhiko Ueki, Humitaka Tamura, Wataru Okamoto, Masayuki Hirayama
  • Publication number: 20040128104
    Abstract: An object state classification method includes a step of designating a to-be-determined object that is to be determined, and a state of the to-be-determined object, a step of creating a method set including, as elements, methods called from the designated state of the to-be-determined object, a step of using, as a to-be-determined state, the designated state of the to-be-determined object or another state obtained by calling methods from the designated state, and executing a program for calling methods included in the method set from the to-be-determined state, a step of recording an execution result in a case of calling the methods, and a step of creating a pseudo-state by merging a method group that is the elements of the method set, and the execution result in the case of calling each method of the method group, in association with the to-be-determined state of the to-be-determined object.
    Type: Application
    Filed: December 17, 2003
    Publication date: July 1, 2004
    Inventors: Masayuki Hirayama, Katsuhiko Ueki, Wataru Okamoto
  • Publication number: 20030125904
    Abstract: One of log analysis methods of the present invention comprises the step of executing a program a plurality of times; executing a program a plurality of times; the step of generating a plurality of logs, each log being recorded a plurality of events occurring upon the execution of the program according to an occurrence order of each of the events in each of the logs; the step of performing a first calculation to calculate an event occurrence probability, for the occurrence order of each event, based on at least one from the program description concerning each event recorded in the logs and the data to be used upon the execution of the program description; and the step of outputting information concerning an event which corresponds to a characteristic included in the logs, based on the event occurrence probability.
    Type: Application
    Filed: December 27, 2002
    Publication date: July 3, 2003
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Katsuhiko Ueki, Humitaka Tamura, Wataru Okamoto, Masayuki Hirayama