Abstract: A signal amplifying circuit including an amplifying transistor having its base-emitter terminals connected to a signal source. A diode having the proper characteristics is also connected across the base-emitter input terminals to produce a first reference bias voltage to be applied to the input circuit of the transistor. The emitter-collector circuit of a compensating transistor is connected in series with the emitter-collector circuit of the amplifying transistor, and a second reference bias voltage is connected between the base of the compensating transistor and the emitter of the amplifying transistor. The second reference bias voltage is produced across a plurality of diodes having the proper characteristics, whereby the current gain of the amplifier will be constant regardless of variations in the transistor characteristics.

Abstract: A separate emitter follower type bias circuit is connected to each base electrode of a transistorized differential amplifier which handles unbalanced input signals. A series circuit of resistors is employed for supplying a suitable bias voltage common to both emitter follower type bias circuits.

Abstract: A transistor biasing circuit having a single biasing transistor for biasing first and second operational transistors. The biasing transistor has means connecting its base to its collector and means are provided to connect the base of each of the first and second operational transistors to the collector circuit of the biasing transistor. Each of the three transistors are arranged in a circuit between a pair of voltage terminals which are connected to a power supply. The arrangement of the resistors in the circuit paths of the biasing transistor and the operational transistors are in such a way as to provide circuit means for stabilizing the collector currents of the first and second transistors regardless of variations in the factor of h.sub.FE. This circuit arrangement provides an improved stabilization of the collector currents over prior art devices.

Abstract: A transistor biasing circuit having circuit means for biasing two amplifier transistors so as to stabilize the DC collector currents thereof regardless of variations in the factor h.sub.FE. The biasing circuit includes a biasing transistor having its emitter connected through specified resistances to the base circuits of the two amplifying transistors. In addition, a pair of series diode connected transistors are connected to the base circuit of the biasing transistor. By selecting specified values of the various resistance used in the biasing circuit arrangement, the desired stabilization technique is obtained. This circuit arrangement is particularly useful in the case of integrated circuits.

Abstract: A variable reactance circuit is composed of a differential amplifier having first and second emitter-coupled transistors, a reactance element, such as a capacitor, connected between the collector and base electrodes of the first transistor, and a control signal source connected to the emitter electrodes of the transistors by which the input impedance of the first transistor is effective as a variable reactance which is changed in accordance with the level of the control signal. Such variable reactance circuit may be used with an oscillator or resonance circuit to constitute a frequency modulator controlled by the control signal source.

Abstract: A high-frequency modulator circuit including a frequency multiplier comprised of a first differential amplifier for receiving a base oscillating signal and for multiplying the frequency of the base oscillating signal to thereby produce a higher frequency carrier signal; and a modulating circuit connected to the first differential amplifier for modulating the carrier signal with input information. The first differential amplifier includes a pair of output terminals; and the modulating circuit is comprised of a second and third differential amplifier, each having a pair of input terminals connected to the respective output terminals of the first differential amplifier such that the higher frequency carrier signal is applied differentially to each of the second and third differential amplifiers.

Abstract: A signal to be controlled is applied to the base of an emitter-follower input transistor, the emitter of which is connected to an input terminal of a differential amplifier. This input terminal of the amplifier is connected by a diode to a controllable current source so that the base current of the differential amplifier input transistor is controlled. A constant current source is connected to the common emitter circuit of the differential amplifier, and the gain of the circuit is determined by the ratio of current in the latter source to current in the controllable source.

Abstract: A gain control circuit of the balanced type whose gain is linearly controllable over a wide range and wherein the DC level at the circuit output is maintained at a constant value regardless of variations of the controlling current. The gain control circuit is comprised of a first differential amplifier which receives an input signal differentially applied thereto, and a second differential amplifier connected in series with the first differential amplifier. Unidirectional conductors are connected to the outputs of the first differential amplifier as a load impedance and variable currents are supplied to the first differential amplifier outputs to control the currents flowing in the unidirectional conductors and thereby vary the load impedances presented by the unidirectional conductors. The amplified output signal is derived from an output of the second differential amplifier.