Patents by Inventor Masayuki Ishikida

Masayuki Ishikida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10483308
    Abstract: A semiconductor package includes: a sheet-like thin plate on which a semiconductor chip is secured; and a substrate including a wiring layer, disposed on the thin plate to extend over a part of a region surrounding the region where the semiconductor chip is secured or over the entire surrounding region, wherein the semiconductor chip and the substrate are electrically connected.
    Type: Grant
    Filed: September 27, 2016
    Date of Patent: November 19, 2019
    Assignee: SONY CORPORATION
    Inventor: Masayuki Ishikida
  • Publication number: 20170018589
    Abstract: A semiconductor package includes: a sheet-like thin plate on which a semiconductor chip is secured; and a substrate including a wiring layer, disposed on the thin plate to extend over a part of a region surrounding the region where the semiconductor chip is secured or over the entire surrounding region, wherein the semiconductor chip and the substrate are electrically connected.
    Type: Application
    Filed: September 27, 2016
    Publication date: January 19, 2017
    Inventor: MASAYUKI ISHIKIDA
  • Patent number: 9472585
    Abstract: A semiconductor package includes: a sheet-like thin plate on which a semiconductor chip is secured; and a substrate including a wiring layer, disposed on the thin plate to extend over a part of a region surrounding the region where the semiconductor chip is secured or over the entire surrounding region, wherein the semiconductor chip and the substrate are electrically connected.
    Type: Grant
    Filed: May 2, 2012
    Date of Patent: October 18, 2016
    Assignee: SONY CORPORATION
    Inventor: Masayuki Ishikida
  • Publication number: 20120286384
    Abstract: A semiconductor package includes: a sheet-like thin plate on which a semiconductor chip is secured; and a substrate including a wiring layer, disposed on the thin plate to extend over a part of a region surrounding the region where the semiconductor chip is secured or over the entire surrounding region, wherein the semiconductor chip and the substrate are electrically connected.
    Type: Application
    Filed: May 2, 2012
    Publication date: November 15, 2012
    Applicant: SONY CORPORATION
    Inventor: Masayuki Ishikida