Abstract: Provided is a measurement apparatus including a signal source configured to output a binary digital signal configuring a multi-tone waveform, a waveform acquisition unit configured to acquire an analog signal waveform generated in response to application of the digital signal to a device under test, and a computation unit configured to calculate a frequency characteristic of the device under test from the waveform acquired by the waveform acquisition unit, in which the signal source is configured to repeatedly output a signal upconverted by multiplying a pseudo-random binary sequence (PRBS) signal by a repeating rectangular wave with a reference frequency and a reference duty ratio.

Abstract: A vehicle control apparatus can continue a control function against abnormality in operation of an arithmetic processor and in the power supply voltage, and capable of improving reliability. Where there is no abnormality, the autonomous travel control unit and an auxiliary control unit calculate control instruction values for automatic driving control, and validate a CAN communication circuit of autonomous travel control units while invalidating a CAN communication circuit of the auxiliary control unit. Where an abnormality occurs in the autonomous travel control unit and not the auxiliary control unit, the CAN communication circuit of the autonomous travel control unit is invalidated and the CAN communication circuit of the auxiliary control unit is validated. Where the auxiliary control unit has no abnormality when the autonomous travel control unit has an abnormality during automatic driving control thereof, seamless automatic driving control with substantially no time lag continues.

Abstract: The electronic control unit ECU includes: a base 2 that has a bottom surface portion 7 on which a printed circuit board 3 is mounted and an opening opposed to the bottom surface portion 7; and a cover 1 that covers at least a part of the bottom surface portion 7 and is engaged with the base 2. Here, the cover 1 includes an overlap portion 5 that is spaced apart from and opposed to a side surface 11 of the base 2, and the overlap portion 5 includes a slit 15.

Abstract: The electronic control unit ECU includes: a base 2 that has a bottom surface portion 7 on which a printed circuit board 3 is mounted and an opening opposed to the bottom surface portion 7; and a cover 1 that covers at least a part of the bottom surface portion 7 and is engaged with the base 2. Here, the cover 1 includes an overlap portion 5 that is spaced apart from and opposed to a side surface 11 of the base 2, and the overlap portion 5 includes a slit 15.

Abstract: Provided is a vehicle control apparatus capable of continuing a control function against abnormality in operation of an arithmetic processor and abnormality in the power supply voltage and capable of improving reliability. In a case where there is no abnormality in a main CPU 11b and a main CPU 12b of an autonomous travel control unit 11 and an auxiliary control unit 12, the autonomous travel control unit 11 and the auxiliary control unit 12 calculate control instruction values for automatic driving control, validate a CAN communication circuit 11c of the autonomous travel control units 11 while invalidating a CAN communication circuit 12c of the auxiliary control unit 12. In a case where abnormality occurs in the autonomous travel control unit 11 and there is no abnormality in the auxiliary control unit 12, the CAN communication circuit 11c of the autonomous travel control unit 11 is invalidated and the CAN communication circuit 12c of the auxiliary control unit 12 is validated.

Abstract: A DA conversion apparatus comprising a DA converting section that includes a plurality of analog elements; and a control section that generates first shift data and second shift data by shifting the input digital data by respective shift amounts of M bits and N bits, and controls the analog elements based on the first shift data and the second shift data, wherein the control section changes a control state for each of the common analog elements according to the bit shift amounts M and N in the control section, between at least two control states including a control state in which the common analog element is controlled according to higher-order bits of the first shift data and a control state in which the common analog element is controlled according higher-order bits of the second shift data.

Abstract: Provided is a sampling apparatus that samples a signal under measurement, including a sampling section that samples the signal under measurement with a plurality of sampling phases at non-uniform intervals for each sampling repetition cycle; and an inverting section that cancels out a replica that is not an observation target, from among the replicas in a sampling band of the signal under measurement and the replicas in the sampling band of a frequency component of the signal under measurement, by inverting signs of values of the signal under measurement sampled with at least one sampling phase from among the plurality of sampling phases.

Abstract: Provided is a test apparatus that tests a device under test, comprising a digital signal generator that outputs in parallel one or more n-bit digital test signals, where n is an integer greater than or equal to 1; a plurality of driver circuits that are connected respectively to a plurality of digital terminals of the device under test; and an analog signal generator that generates an analog test signal by converting, into an analog signal, an n×m-bit digital multi-bit signal based on the one or more digital test signals output by the digital signal generator to the plurality of driver circuits, where m is an integer greater than or equal to 2.

Abstract: Provided is a sampling apparatus that samples a signal under measurement, including a sample processing section that outputs sample data obtained by sampling the signal under measurement with a sampling timing at non-uniform intervals obtained by thinning a reference clock, a storage section that stores the sample data, and a waveform generating section that generates a waveform of the signal under measurement based on the sample data read from the storage section. The sample processing section includes a sampler that samples the signal under measurement in synchronization with the reference clock and a data thinning section that thins the sample data output by the sampler and outputs this thinned data as sample data with the sampling timing at non-uniform intervals.

Abstract: Provided is a sampling apparatus that samples a signal under measurement, including a clock control section that generates a plurality of sampling clocks at a plurality of sampling phases at determined non-uniform intervals, so as to cancel out replicas in a sampling band that are not observation targets, from among the replicas of the signal under measurement and the replicas of the negative frequency component of the signal under measurement, in each sampling repetition cycle; and a sampling section that samples the signal under measurement with each of the plurality of sampling clocks.

Abstract: A sampling apparatus that converts an analog target signal in which the same waveform repeats into a digital value by sampling the target signal at each of a plurality of phases, and outputs the digital value. The sampling apparatus comprises a designating section that sequentially designates bits in the digital value as target bits, beginning with the most significant bits; a generating section that, for each designated target bit, generates a threshold value for determining a value of the target bit based on a determined value of a bit that is higher-order than the target bit in the digital value at each of the phases; and a converting section that, for each designated target bit, determines the value of the target bit in the digital value at each phase by comparing the target signal to an analog comparison signal corresponding to the threshold value at each phase.

Abstract: A DUT comprises a notifying circuit configured to generate a notification signal which is used to notify an external circuit of an event that leads to a change in the operating current of the DUT before such an event occurs. A main power supply supplies electric power to a power supply terminal of the DUT. A power supply compensation circuit comprises a switch element which is controlled according to a control signal, and is configured to generate a compensation pulse current according to the on/off state of the switch element. A compensation control circuit receives the notification signal from the DUT, and outputs, to the power supply compensation circuit, a control signal which is used to control the switch element, and which is generated based upon at least the notification signal.

Abstract: Provided is a test apparatus that tests a device under test. The device under test includes: a circuit under test; and a switching section that that connects an internal terminal being tested, from among one or more internal terminals of the circuit under test, to external terminals connected to the test apparatus.

Abstract: A test apparatus tests a DUT formed on a wafer. A power supply compensation circuit includes source and a sink switches each controlled according to a control signal. When the source or sink switch is turned on, a compensation pulse current is generated, and the compensation pulse current is injected into a power supply terminal of the DUT via a path that differs from that of a main power supply, or is drawn from the power supply current that flows from the main power supply to the DUT via a path that differs from that of the power supply terminal of the DUT. Of components forming the power supply compensation circuit, including the source and sink switches, a part is formed on the wafer. Pads are formed on the wafer in order to apply a signal to such a part of the power supply compensation circuit formed on the wafer.

Abstract: Provided is a signal generating apparatus comprising a DA converter that outputs an output signal corresponding to input data supplied thereto; a sample/hold unit that is provided between the DA converter and an output end of the signal generating apparatus, and that samples an output voltage of the DA converter and holds the sampled output voltage; a comparing section that compares (i) a level of a signal output from an analog circuit that propagates the output signal to output a signal corresponding to the input data to (ii) a level of the signal output by the DA converter; and a control section that, during a holding period, (iii) provides the DA converter with comparison data instead of the input data to cause the DA converter to output a comparison voltage corresponding to the comparison data, (iv) causes the comparing section to compare a voltage of the signal output by the analog circuit to the comparison voltage, and (v) adjusts the output voltage of the DA converter based on a comparison result of th

Abstract: Provided is an AD conversion apparatus including: a differential amplifier that generates a differential input voltage according to an analog input signal; a differential DA converter of a charge redistribution type, which outputs a differential output voltage resulting from subtracting the differential input voltage from a differential comparison voltage that is in accordance with comparison data; a comparator that compares a positive output voltage and a negative output voltage in the differential output voltage; a control section that identifies the comparison data at which the differential output voltage becomes substantially 0 based on a comparison result of the comparator, and outputs the identified comparison data as output data; and a setting section that sets at least one of a common potential of the differential amplifier and a common potential of the differential DA converter, according to a targeted value of a common potential of the comparator

Abstract: Provided is a measurement apparatus that measures a signal under measurement input thereto, comprising a plurality of signal measurement circuits that measure a level of a signal input thereto, according to a sampling clock provided thereto; a noise measuring section that measures a noise component propagated from a first signal measurement circuit to a second signal measurement circuit, among the plurality of signal measurement circuits, based on a measurement result output by the second signal measurement circuit; and a clock supplying section that, when the signal under measurement is being measured, supplies the first signal measurement circuit and the second signal measurement circuit with sampling clocks having the same period and that, when the noise component is being measured, supplies the first signal measurement circuit and the second signal measurement circuit with sampling clocks having different periods.

Abstract: Provided is a signal generating apparatus that outputs from an output end thereof an output voltage corresponding to input data supplied thereto, comprising: a DA converter that outputs a voltage corresponding to data supplied thereto; a capacitor section that is provided between the output end and a standard potential; a transmission switch that provides a connection or a disconnect between a voltage generating end of the DA converter and the output end; and a control section that causes the DA converter to charge the capacitor section with a voltage corresponding to the input data by repeatedly connecting and disconnecting the transmission switch, thereby causing the voltage of the capacitor section to gradually approach the output voltage corresponding to the input data.

Abstract: Provided is an AD conversion apparatus including: a differential amplifier that generates a differential input voltage according to an analog input signal; a differential DA converter of a charge redistribution type, which outputs a differential output voltage resulting from subtracting the differential input voltage from a differential comparison voltage that is in accordance with comparison data; a comparator that compares a positive output voltage and a negative output voltage in the differential output voltage; a control section that identifies the comparison data at which the differential output voltage becomes substantially 0 based on a comparison result of the comparator, and outputs the identified comparison data as output data; and a setting section that sets at least one of a common potential of the differential amplifier and a common potential of the differential DA converter, according to a targeted value of a common potential of the comparator

Abstract: Provided is a signal generating apparatus that outputs from an output end thereof an output voltage corresponding to input data supplied thereto, comprising: a DA converter that outputs a voltage corresponding to data supplied thereto; a capacitor section that is provided between the output end and a standard potential; a transmission switch that provides a connection or a disconnect between a voltage generating end of the DA converter and the output end; and a control section that causes the DA converter to charge the capacitor section with a voltage corresponding to the input data by repeatedly connecting and disconnecting the transmission switch, thereby causing the voltage of the capacitor section to gradually approach the output voltage corresponding to the input data.