Abstract: According to an aspect, a display device includes: a display unit that has a plurality of scanning signal lines to which a scanning signal is applied; a shift register that has a plurality of transfer circuits configured in a plurality of stages that perform a shift operation for temporarily storing a shift signal that has been input and sequentially transmitting the stored shift signal to a subsequent stage in synchronization with a clock signal having a discontinued period, and outputs the scanning signal to a scanning signal line corresponding to a transfer circuit that maintains the shift signal; and a signal line that transmits a holding potential signal for maintaining a potential of the shift signal to a transfer circuit that maintains the shift signal in the discontinued period of the clock signal.

Abstract: According to an aspect, a display device includes: a display unit that has a plurality of scanning signal lines to which a scanning signal is applied; a shift register that has a plurality of transfer circuits configured in a plurality of stages that perform a shift operation for temporarily storing a shift signal that has been input and sequentially transmitting the stored shift signal to a subsequent stage in synchronization with a clock signal having a discontinued period, and outputs the scanning signal to a scanning signal line corresponding to a transfer circuit that maintains the shift signal; and a signal line that transmits a holding potential signal for maintaining a potential of the shift signal to a transfer circuit that maintains the shift signal in the discontinued period of the clock signal.

Abstract: According to an aspect, a display device includes: a display unit that has a plurality of scanning signal lines to which a scanning signal is applied; a shift register that has a plurality of transfer circuits configured in a plurality of stages that perform a shift operation for temporarily storing a shift signal that has been input and sequentially transmitting the stored shift signal to a subsequent stage in synchronization with a clock signal having a discontinued period, and outputs the scanning signal to a scanning signal line corresponding to a transfer circuit that maintains the shift signal; and a signal line that transmits a holding potential signal for maintaining a potential of the shift signal to a transfer circuit that maintains the shift signal in the discontinued period of the clock signal.

Abstract: According to an aspect, a display device includes: a display unit that has a plurality of scanning signal lines to which a scanning signal is applied; a shift register that has a plurality of transfer circuits configured in a plurality of stages that perform a shift operation for temporarily storing a shift signal that has been input and sequentially transmitting the stored shift signal to a subsequent stage in synchronization with a clock signal having a discontinued period, and outputs the scanning signal to a scanning signal line corresponding to a transfer circuit that maintains the shift signal; and a signal line that transmits a holding potential signal for maintaining a potential of the shift signal to a transfer circuit that maintains the shift signal in the discontinued period of the clock signal.

Abstract: A driving system that drives an electro-optic device including a plurality of pixel electrodes, a counter electrode, a plurality of storage capacitor elements, and an electro-optic material is provided. The driving system includes a supply circuit that selectively supplies voltage to first and second ends of capacitor elements corresponding to a first horizontal line. A switching circuit is also provided that switches, in sequence every predetermined period, each of the voltages to be supplied to the second end of the capacitor elements from a first voltage to a second voltage or from the second voltage to the first voltage. A control circuit electrically connects the second end of the first storage capacitor elements and to each other before the voltage switched by the switching circuit is supplied to the second end of at least one of the storage capacitor elements.

Abstract: Disclosed herein is a shift register including shift register unit circuits of a plurality of stages. Each of the shift register unit circuits of the plurality of stages includes a first transistor having a source and a drain to one of which a first clock signal is input and a gate to which a second clock signal obtained by substantially inverting the first clock signal is input. When the second clock signal at one of an H level and an L level is input to the gate of the first transistor, the first clock signal at the other of the H level and the L level is input to one of the source and the drain of the first transistor.

Abstract: A driving system that drives an electro-optic device including a plurality of pixel electrodes, a counter electrode, a plurality of storage capacitor elements, and an electro-optic material is provided. The driving system includes a supply circuit that selectively supplies voltage to first and second ends of capacitor elements corresponding to a first horizontal line. A switching circuit is also provided that switches, in sequence every predetermined period, each of the voltages to be supplied to the second end of the capacitor elements from a first voltage to a second voltage or from the second voltage to the first voltage. A control circuit electrically connects the second end of the first storage capacitor elements and to each other before the voltage switched by the switching circuit is supplied to the second end of at least one of the storage capacitor elements.

Abstract: When a selection TFT and a correction TFT are turned on, a data voltage of a data line is stored in a storage capacitor as a gate voltage of a driving TFT. After turning off the selection TFT, a voltage of a capacitor line SC falls, thereby turning on the driving TFT to supply a driving current to an organic EL element. The correction TFT is in the ON state before the capacitor line SC falls, and is turned off in the course of the fall of the line. Consequently, the capacitance of the correction TFT changes during the fall of the gate voltage, and the gradient of the gate voltage fall of the driving TFT is changed, thereby setting the gate voltage after the capacitor line SC falls in accordance with variation in threshold of the driving TFT. Particularly by disposing the driving TFT and the correction TFT adjacent to each other, the two TFTs are provided with the same properties to achieve effective correction.

Abstract: A display allowing further miniaturization when including a plurality of display panels is obtained. This display comprises a first display panel formed on a substrate and a second display panel formed on the same substrate on a region different from that formed with the first display panel. Thus, the display can be further miniaturized as compared with that having a first display panel and a second display panel formed on different substrates.

Abstract: When a switching TFT is switched on, a data voltage on a data line is stored in a storage capacitor as a gate voltage of a driver TFT. In this state, a voltage on a pulse drive line is caused to fall. AMOS type capacity element having a second electrode connected to a reference voltage is connected to a gate of the driver TFT. The MOS type capacity element is in an ON state before a fall of the pulse drive line and becomes an OFF state during the fall, and a capacitance changes at the switching of ON state to the OFF state. Therefore, the slope of fall of the gate voltage changes, and the gate voltage after the fall on the pulse drive line can be corrected corresponding to the variation in the threshold values among driver TFTs.

Abstract: When the orientation of liquid crystal molecules in a pixel are divided by an orientation divider, a boundary of the orientation is produced at any part of the pixel. A drain signal line (54) is formed to overlap with the boundary so that a light-shielding region in the pixel is decreased and an aperture ratio can be improved. Leakage of light caused when the orientation is disturbed can be shielded by the drain signal line (54), and contrast can be enhanced. The orientation divider can be an orientation control window (36), an orientation control slope (90) or the like.

Abstract: When the orientation of liquid crystal molecules in a pixel are divided by an orientation divider, a boundary of the orientation is produced at any part of the pixel. A drain signal line (54) is formed to overlap with the boundary so that a light-shielding region in the pixel is decreased and an aperture ratio can be improved. Leakage of light caused when the orientation is disturbed can be shielded by the drain signal line (54), and contrast can be enhanced. The orientation divider can be an orientation control window (36), an orientation control slope (90) or the like.

Abstract: When the orientation of liquid crystal molecules in a pixel are divided by an orientation divider, a boundary of the orientation is produced at any part of the pixel. A drain signal line (54) is formed to overlap with the boundary so that a light-shielding region in the pixel is decreased and an aperture ratio can be improved. Leakage of light caused when the orientation is disturbed can be shielded by the drain signal line (54), and contrast can be enhanced. The orientation divider can be an orientation control window (36), an orientation control slope (90) or the like.

Abstract: When the orientation of liquid crystal molecules in a pixel are divided by an orientation divider, a boundary of the orientation is produced at any part of the pixel. A drain signal line (54) is formed to overlap with the boundary so that a light-shielding region in the pixel is decreased and an aperture ratio can be improved. Leakage of light caused when the orientation is disturbed can be shielded by the drain signal line (54), and contrast can be enhanced. The orientation divider can be an orientation control window (36), an orientation control slope (90) or the like.

Abstract: When the orientation of liquid crystal molecules in a pixel are divided by an orientation divider, a boundary of the orientation is produced at any part of the pixel. A drain signal line (54) is formed to overlap with the boundary so that a light-shielding region in the pixel is decreased and an aperture ratio can be improved. Leakage of light caused when the orientation is disturbed can be shielded by the drain signal line (54), and contrast can be enhanced. The orientation divider can be an orientation control window (36), an orientation control slope (90) or the like.

Abstract: When the orientation of liquid crystal molecules in a pixel are divided by an orientation divider, a boundary of the orientation is produced at any part of the pixel. A drain signal line (54) is formed to overlap with the boundary so that a light-shielding region in the pixel is decreased and an aperture ratio can be improved. Leakage of light caused when the orientation is disturbed can be shielded by the drain signal line (54), and contrast can be enhanced. The orientation divider can be an orientation control window (36), an orientation control slope (90) or the like.

Abstract: When the orientation of liquid crystal molecules in a pixel are divided by an orientation divider, a boundary of the orientation is produced at any part of the pixel. A drain signal line (54) is formed to overlap with the boundary so that a light-shielding region in the pixel is decreased and an aperture ratio can be improved. Leakage of light caused when the orientation is disturbed can be shielded by the drain signal line (54), and contrast can be enhanced. The orientation divider can be an orientation control window (36), an orientation control slope (90) or the like.

Abstract: When a gate voltage having a rectangular-shaped pulse is supplied, the voltage of a pixel electrode is pulled down and fluctuated by a fall of the gate voltage due to a parasitic capacitor formed between a gate line and the pixel electrode, i.e. a so-called drop voltage is generated. As the drop voltage depends on a time constant of a change in the gate voltage, it can be diminished by smoothing the falling edge of the gate voltage. This is achieved by, for example, providing a current discharging transistor of a gate driver 8 with a small channel width to decrease the maximum current value. By utilizing such a gate voltage, a liquid crystal display device with a small drop voltage can be provided, even when the capacitance of the parasitic capacitor is great.

Abstract: When a selection TFT (20) and a correction TFT (22) are turned on, a data voltage of a data line is stored in a storage capacitor 28 as a gate voltage of a driving TFT (24). After turning off the selection TFT (20), a voltage of a capacitor line SC falls, thereby turning on the driving TFT (24) to supply a driving current to an organic EL element (26). The correction TFT (22) is in the ON state before the capacitor line SC falls, and is turned off in the course of the fall of the line. Consequently, the capacitance of the correction TFT (22) changes during the fall of the gate voltage, and the gradient of the gate voltage fall of the driving TFT (24) is changed, thereby setting the gate voltage after the capacitor line SC falls in accordance with variation in threshold of the driving TFT (24). Particularly by disposing the driving TFT (24) and the correction TFT (22) adjacent to each other, the two TFTs are provided with the same properties to achieve effective correction.

Abstract: A synchronous transmission network system has a plurality of nodes including a plurality of clock supply nodes and all the nodes synchronize with a clock supplied from one of clock supply nodes as a master, wherein each clock supply node includes a transmission module for transmitting a quality request message toward all other nodes, a receiving module for receiving quality response messages from all the other nodes, a quality determination module for determining clock supply quality information, a notifying module for notifying other clock supply node serving as the master of the clock supply quality information, and a node determination module for determining an optimum clock supply node exhibiting the best clock supply quality on the basis of the notified clock supply quality information and the clock supply quality information of the self-node.