Abstract: A method of fabricating a semiconductor device, includes forming an element isolation trench by processing a silicon substrate and a film to be processed, and filling the element isolation trench with an insulating film by a thermal CVD method. The thermal CVD method in filling the trench is executed under a film forming condition that the insulating film filling a part of the trench that is level with or is located lower than an upper surface of the silicon substrate has a porosity set so as to be not less than 5% and that the insulating film filling a part of the trench located higher than the upper surface of the silicon substrate has a lower deposition rate than the insulating film filling said part of the trench that is level with or is located lower than the upper surface of the silicon substrate.