Abstract: An interface circuit functions as a so-called voltage tolerant circuit to which signals may be applied from, for example, a 3.3-V internal source or from an external source operating with a supply voltage greater than the internal source, for example, a 5-V source. By eliminating a floating voltage state in the internal circuits, problem-causing current leaks can be prevented in substantially all operating modes, that is, in any signal input or output mode, and in any voltage transition state, that is, irrespective of the sequence in which, for example, 0-V, 3.3-V, and 5-V signals are applied.

Abstract: An interface circuit functions as a so-called voltage tolerant circuit to which signals may be applied from, for example, a 3.3-V internal source or from an external source operating with a supply voltage greater than the internal source, for example, a 5-V source. By eliminating a floating voltage state in the internal circuits, problem-causing current leaks can be prevented in substantially all operating modes, that is, in any signal input or output mode, and in any voltage transition state, that is, irrespective of the sequence in which, for example, 0-V, 3.3-V, and 5-V signals are applied.

Abstract: An interface circuit functions as a so-called voltage tolerant circuit to which signals may be applied from, for example, a 3.3-V internal source or from an external source operating with a supply voltage greater than the internal source, for example, a 5-V source. By eliminating a floating voltage state in the internal circuits, problem-causing current leaks can be prevented in substantially all operating modes, that is, in any signal input or output mode, and in any voltage transition state, that is, irrespective of the sequence in which, for example, 0-V, 3.3-V, and 5-V signals are applied.

Abstract: A gate array driven by a plurality of source voltages and an electronic equipment using such a gate array are provided. The gate array comprises a plurality of P-well regions and a plurality of N-well regions, all of which are formed in an internal cell region in a first direction and alternately arranged in a second direction perpendicular to the first direction on a semiconductor substrate. A plurality of first basic cells receive a first source voltage VDD1 through a first source wiring layer, these first basic cells being respectively formed on a pair of P-well and N-well regions. A plurality of second basic cells receive a second source voltage VDD2 through a second source wiring layer, these second basic cells being respectively formed on a pair of P-well and N-well regions. A voltage level shifter for shifting the voltage level between data voltages outputted from first and second basic cell trains is formed on an region containing at least three of the P-well and N-well regions.

Abstract: There are provided an input/output buffer circuit having a reduced power consumption, and an electronic equipment using these buffer circuits. An input buffer is located on an input line while an output buffer is disposed on an output line. Each of the buffers is connected to an input/output line having input/output terminals. A latch circuit is connected to the input/output line and is switched between a first ON state in which the latch circuit is latchable and a first OFF state in which an output end of the latch circuit is in high impedance by a first control signal from a first control terminal. The output buffer is switched between a second ON state in which the output buffer can output a signal and a second OFF state in which an output end of the output buffer is in high impedance by a second control signal from a second control terminal.

Abstract: A racing tire for oval race courses, wherein a profile of an outer region of a tread portion which is positioned to be further axially outward toward an outer side of a race course than a center line of the tire and a profile of an inner region of the tread portion which is positioned to be further axially inward toward an inner side of the race course than the same center line are asymmetrical, an outer diameter and thickness of the outer region of the tread portion being larger than an outer diameter and thickness of the inner region of the tread portion, a difference between the outer diameters of portions of the tire spaced from the center line of the tire in the opposite widthwise directions from the center line by a distance corresponding to 45% of a maximum width of the tire being set to 0.5-5.0% of the outer diameter of a portion of the tire on the center line.

Abstract: A humidity conditioner comprising a moisture absorber and a heating element attached to or embedded in the moisture absorber. The moisture absorber includes a porous material having continuous fine interstices, and a hygroscopic filler filling the interstices.

Abstract: A ceramic sheet comprising 5 to 50 wt. % (absolute dry weight) of a cation-modified pulp having a degree of substitution of cationic group of 0.02 to 0.04 and beaten to freeness of 200 to 100 ml C.S.F. and 50 to 95 wt. % of fine inorganic particles dispersed uniformly in and supported by said cation-modified pulp. This ceramic sheet can be easily prepared from an aqueous suspension of the cation-modified pulp and the fine inorganic particles by using a paper-making treatment.