Patents by Inventor Masayuki Otsuka
Masayuki Otsuka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11953841Abstract: An image forming apparatus according to this disclosure includes: a charging roller that charges a surface of a photoconductor drum; a development unit that forms a toner image on the surface of the photoconductor drum; an image density sensor that detects density of the formed toner image; a charge power supply that applies a bias voltage to the charging roller; a development power supply that applies a bias voltage to the development unit; and a controller. The controller causes the charge and development power supplies to output respective predetermined bias voltages for predetermined time, and is capable of executing a contact and separation determination mode in which a contact and separation state of the charging roller is determined based on whether or not an image is detected by the image density sensor after output of the respective bias voltages.Type: GrantFiled: February 20, 2023Date of Patent: April 9, 2024Assignee: SHARP KABUSHIKI KAISHAInventor: Masayuki Otsuka
-
Patent number: 11831281Abstract: A semiconductor integrated circuit is capable of electrically connecting to a capacitance variable capacitor whose electrostatic capacitance changes corresponding to an environmental change between a first and a second capacitances and determines whether the electrostatic capacitance of the capacitance variable capacitor has changed to exceed a reference capacitance value.Type: GrantFiled: May 12, 2022Date of Patent: November 28, 2023Assignee: LAPIS Semiconductor Co., Ltd.Inventor: Masayuki Otsuka
-
Publication number: 20230341272Abstract: The disclosure includes: an electrode pad connected between a capacitor that is a target of detection and a first node for externally connecting the capacitor; a reference capacitive circuit that has a reference electrostatic capacity and applies the reference electrostatic capacity to a second node; a determination circuit that includes first and second relay terminals, supplies a charging current from the first relay terminal to an electrode pad via the first node, supplies a charging current from the second relay terminal to the reference capacitive circuit via the second node, and subsequently detects electrostatic capacity of the capacitor and determines whether or not the electrostatic capacity of the capacitor has changed by comparing magnitudes of potentials at the first relay terminal and the second relay terminal; and a correction capacitive circuit that applies a designated electrostatic capacity to the first node and is capable of varying the electrostatic capacity.Type: ApplicationFiled: April 20, 2023Publication date: October 26, 2023Applicant: LAPIS Technology Co., Ltd.Inventor: Masayuki Otsuka
-
Publication number: 20230268731Abstract: An electrostatic breakdown protection circuit and a capacitance sensor device are provided. An electrostatic breakdown protection circuit included in an electronic device including an external terminal and an internal circuit connected to the external terminal includes: a first series diode group in which n diodes including a first diode having an anode connected to the external terminal and a second diode having a cathode applied with a power supply voltage are connected in series; and a second series diode group in which n diodes including a third diode having a cathode connected to the external terminal and a fourth diode having an anode applied with a ground voltage are connected in series.Type: ApplicationFiled: February 17, 2023Publication date: August 24, 2023Applicant: LAPIS Technology Co., Ltd.Inventors: Masayuki Otsuka, Satoru KUROTSU
-
Publication number: 20230266692Abstract: An image forming apparatus according to this disclosure includes: a charging roller that charges a surface of a photoconductor drum; a development unit that forms a toner image on the surface of the photoconductor drum; an image density sensor that detects density of the formed toner image; a charge power supply that applies a bias voltage to the charging roller; a development power supply that applies a bias voltage to the development unit; and a controller. The controller causes the charge and development power supplies to output respective predetermined bias voltages for predetermined time, and is capable of executing a contact and separation determination mode in which a contact and separation state of the charging roller is determined based on whether or not an image is detected by the image density sensor after output of the respective bias voltages.Type: ApplicationFiled: February 20, 2023Publication date: August 24, 2023Inventor: Masayuki OTSUKA
-
Patent number: 11674857Abstract: A semiconductor device includes first and second electrode pads for externally connecting two electrodes of a sensor capacitor that has a capacitance that changes according to an environmental change. The semiconductor device further includes a capacitor having a pair of electrodes, one of the pair of electrodes being connected to the first electrode pad, a capacitance circuit having a reference capacitance, and a determination circuit that includes first and second relay terminals. The determination circuit is configured to send a charging current from the first relay terminal to the other electrode of the capacitor and send a charging current from the second relay terminal to the capacitance circuit, and determine whether or not the size of a potential of the first relay terminal is greater than the size of a potential of the second relay terminal, thereby determining whether a capacitance of the sensor capacitor has changed or not.Type: GrantFiled: October 22, 2020Date of Patent: June 13, 2023Assignee: LAPIS SEMICONDUCTOR CO., LTD.Inventor: Masayuki Otsuka
-
Patent number: 11635309Abstract: A semiconductor device comprises a control unit, a semiconductor memory, a reference capacitance unit, a determination capacitance unit, a calibration circuit configured to supply a selection signal to the reference capacitance unit to selectively connect capacitors to differing potentials, and a determination circuit configured to charge a capacitance of the reference capacitance unit, to charge a capacitance of the determination capacitance unit, and to attain a comparison result by comparing the differing potentials. The control unit is configured to control rewriting of the semiconductor memory on the basis of a determination result of the determination circuit.Type: GrantFiled: February 4, 2022Date of Patent: April 25, 2023Assignee: LAPIS TECHNOLOGY CO., LTD.Inventor: Masayuki Otsuka
-
Publication number: 20220271718Abstract: A semiconductor integrated circuit is capable of electrically connecting to a capacitance variable capacitor whose electrostatic capacitance changes corresponding to an environmental change between a first and a second capacitances and determines whether the electrostatic capacitance of the capacitance variable capacitor has changed to exceed a reference capacitance value.Type: ApplicationFiled: May 12, 2022Publication date: August 25, 2022Applicant: LAPIS Semiconductor Co., Ltd.Inventor: Masayuki Otsuka
-
Publication number: 20220252433Abstract: A semiconductor device comprises a control unit, a semiconductor memory, a reference capacitance unit, a determination capacitance unit, a calibration circuit configured to supply a selection signal to the reference capacitance unit to selectively connect capacitors to differing potentials, and a determination circuit configured to charge a capacitance of the reference capacitance unit, to charge a capacitance of the determination capacitance unit, and to attain a comparison result by comparing the differing potentials. The control unit is configured to control rewriting of the semiconductor memory on the basis of a determination result of the determination circuit.Type: ApplicationFiled: February 4, 2022Publication date: August 11, 2022Applicant: LAPIS Technology Co., Ltd.Inventor: Masayuki OTSUKA
-
Patent number: 11368128Abstract: A capacitance sensor circuit is provided, including: a capacitance variable capacitor changing from a first capacitance to a second capacitance corresponding to environmental change; a reference capacitor; and an amplifier circuit charging the capacitance variable capacitor via a first node and the reference capacitor via a second node, and outputting a determination signal. In the amplifier circuit, a differential amplification part generates a potential difference signal obtained by amplifying the potential difference between the first and the second nodes; an output part outputs the determination signal based on the potential difference signal; and when the difference between the increase degrees of the potentials of the first and the second nodes is less than a predetermined value, the output part holds and outputs the determination signal immediately before that state and a bias control part stops a current flowing through the differential amplification part.Type: GrantFiled: February 19, 2020Date of Patent: June 21, 2022Assignee: LAPIS Semiconductor Co., Ltd.Inventor: Masayuki Otsuka
-
Publication number: 20210131879Abstract: A semiconductor device includes first and second electrode pads for externally connecting two electrodes of a sensor capacitor that has a capacitance that changes according to an environmental change. The semiconductor device further includes a capacitor having a pair of electrodes, one of the pair of electrodes being connected to the first electrode pad, a capacitance circuit having a reference capacitance, and a determination circuit that includes first and second relay terminals. The determination circuit is configured to send a charging current from the first relay terminal to the other electrode of the capacitor and send a charging current from the second relay terminal to the capacitance circuit, and determine whether or not the size of a potential of the first relay terminal is greater than the size of a potential of the second relay terminal, thereby determining whether a capacitance of the sensor capacitor has changed or not.Type: ApplicationFiled: October 22, 2020Publication date: May 6, 2021Applicant: LAPIS Semiconductor Co., Ltd.Inventor: Masayuki OTSUKA
-
Publication number: 20200274498Abstract: A capacitance sensor circuit is provided, including: a capacitance variable capacitor changing from a first capacitance to a second capacitance corresponding to environmental change; a reference capacitor; and an amplifier circuit charging the capacitance variable capacitor via a first node and the reference capacitor via a second node, and outputting a determination signal. In the amplifier circuit, a differential amplification part generates a potential difference signal obtained by amplifying the potential difference between the first and the second nodes; an output part outputs the determination signal based on the potential difference signal; and when the difference between the increase degrees of the potentials of the first and the second nodes is less than a predetermined value, the output part holds and outputs the determination signal immediately before that state and a bias control part stops a current flowing through the differential amplification part.Type: ApplicationFiled: February 19, 2020Publication date: August 27, 2020Applicant: LAPIS SEMICONDUCTOR CO., LTD.Inventor: Masayuki Otsuka
-
Patent number: 10673326Abstract: A semiconductor device including: a semiconductor substrate; at least one circuit block provided on a main surface of the semiconductor substrate and having a predetermined function; a wiring layer including plural metal layers that connect the circuit block; and plural capacitors including a first capacitor connected to the circuit block and that uses the plurality of metal layers, and a second capacitor that uses an active area disposed within the main surface of the semiconductor substrate, wherein at least one of the first capacitor and at least one of the second capacitor are stacked in a stacking direction of layers of the semiconductor.Type: GrantFiled: November 27, 2018Date of Patent: June 2, 2020Assignee: LAPIS SEMICONDUCTOR CO., LTD.Inventor: Masayuki Otsuka
-
Patent number: 10366764Abstract: Provided is a sense amplifier circuit for detecting data having been read from a memory cell. The sense amplifier circuit includes: a potential control unit for controlling the potential of a bit line connected to a memory cell; a current amplifier unit for amplifying a readout current flowing from the memory cell to the bit line so as to produce an amplified current; and a detection unit for detecting data having been read from the memory cell on the basis of the amplified current. The potential control unit controls the potential of the bit line in a data readout duration, and the data readout duration includes a current amplification duration, and the current amplifier unit amplifies the readout current in the current amplification duration.Type: GrantFiled: November 21, 2017Date of Patent: July 30, 2019Assignee: LAPIS Semiconductor Co., Ltd.Inventor: Masayuki Otsuka
-
Publication number: 20190165673Abstract: A semiconductor device including: a semiconductor substrate; at least one circuit block provided on a main surface of the semiconductor substrate and having a predetermined function; a wiring layer including plural metal layers that connect the circuit block; and plural capacitors including a first capacitor connected to the circuit block and that uses the plurality of metal layers, and a second capacitor that uses an active area disposed within the main surface of the semiconductor substrate, wherein at least one of the first capacitor and at least one of the second capacitor are stacked in a stacking direction of layers of the semiconductor.Type: ApplicationFiled: November 27, 2018Publication date: May 30, 2019Inventor: MASAYUKI OTSUKA
-
Publication number: 20180151233Abstract: Provided is a sense amplifier circuit for detecting data having been read from a memory cell. The sense amplifier circuit includes: a potential control unit for controlling the potential of a bit line connected to a memory cell; a current amplifier unit for amplifying a readout current flowing from the memory cell to the bit line so as to produce an amplified current; and a detection unit for detecting data having been read from the memory cell on the basis of the amplified current. The potential control unit controls the potential of the bit line in a data readout duration, and the data readout duration includes a current amplification duration, and the current amplifier unit amplifies the readout current in the current amplification duration.Type: ApplicationFiled: November 21, 2017Publication date: May 31, 2018Applicant: LAPIS Semiconductor Co., Ltd.Inventor: Masayuki OTSUKA
-
Patent number: 9983532Abstract: An image forming apparatus includes: a roller arranged in a position between a drive roller and an idle roller and downstream from the drive roller in a rotation direction of an intermediate transfer belt while pressing an outer surface of the belt; and a density measuring portion arranged between the drive roller and the roller applying pressure. The density measuring portion optically detects the density of a test patch formed on the outer surface and in a given position of a width direction of the belt. The density measuring portion includes: an optical sensor provided above the outer surface of the belt; and a support member abutting on an inner surface of the belt in a position in which the support member faces the optical sensor across the belt in the rotation direction.Type: GrantFiled: August 23, 2016Date of Patent: May 29, 2018Assignee: SHARP KABUSHIKI KAISHAInventors: Masayuki Otsuka, Ginga Nakamura, Takashi Kitagawa
-
Patent number: 9928921Abstract: There is provided a non-volatile memory circuit including: plural storage element sections each including a zener zap device and a switch section that connects an anode of the zener zap device to an output terminal during data reading; and wherein cathodes of respective zener zap devices of the plural storage element sections are commonly connected so as to be connected to a power supply employed in the writing or to a power supply employed in the reading, wherein the output terminals of the plural storage element sections are commonly connected to an input terminal of a detector, an anode of each of the storage element sections being connected to a ground voltage during data writing, and wherein the switch section is switched ON during data reading so as to connect the anode of the storage element section through the output terminal to the input terminal of the detector.Type: GrantFiled: February 12, 2016Date of Patent: March 27, 2018Assignee: LAPIS Semiconductor Co., Ltd.Inventor: Masayuki Otsuka
-
Patent number: 9602003Abstract: A voltage regulator includes: a drive voltage generating part for generating a drive voltage and then apply the drive voltage to a drive line; an output transistor for outputting a voltage corresponding to a voltage value of the drive line as the internal source voltage; and a compulsory drive circuit including a capacitor element configured to receive the source voltage at one end, a first switching element for receiving a ground voltage and applying the ground voltage to the other end of the capacitor element by being set in an ON state over a period in which the selected operational mode is the standby mode, and a second switching element that connects the other end of the capacitor element to the drive line only for a predetermined period in an ON state when the operational mode transitions from the standby mode to the active mode.Type: GrantFiled: April 19, 2016Date of Patent: March 21, 2017Assignee: LAPIS SEMICONDUCTOR CO., LTD.Inventor: Masayuki Otsuka
-
Publication number: 20170075274Abstract: An image forming apparatus includes: a roller arranged in a position between a drive roller and an idle roller and downstream from the drive roller in a rotation direction of an intermediate transfer belt while pressing an outer surface of the belt; and a density measuring portion arranged between the drive roller and the roller applying pressure. The density measuring portion optically detects the density of a test patch formed on the outer surface and in a given position of a width direction of the belt. The density measuring portion includes: an optical sensor provided above the outer surface of the belt; and a support member abutting on an inner surface of the belt in a position in which the support member faces the optical sensor across the belt in the rotation direction.Type: ApplicationFiled: August 23, 2016Publication date: March 16, 2017Inventors: Masayuki OTSUKA, Ginga NAKAMURA, Takashi KITAGAWA