Patents by Inventor Masayuki Tachikawa

Masayuki Tachikawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Manufacturing method of semiconductor device
    Patent number: 8940601
    Abstract: A manufacturing method of a semiconductor device includes the following steps. Firstly, a lower electrode is formed over a substrate (semiconductor substrate). Successively, the lower electrode is primarily crystallized. Successively, a capacitance dielectric layer is formed over the lower electrode after primarily crystallized. Successively, the capacitance dielectric layer is secondarily crystallized. Then, an upper electrode is formed over the capacitance dielectric layer.
    Type: Grant
    Filed: July 6, 2012
    Date of Patent: January 27, 2015
    Assignee: Renesas Electronics Corporation
    Inventors: Misato Sakamoto, Youichi Yamamoto, Masayuki Tachikawa, Yoshitake Kato
  • MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
    Publication number: 20130011994
    Abstract: A manufacturing method of a semiconductor device includes the following steps. Firstly, a lower electrode is formed over a substrate (semiconductor substrate). Successively, the lower electrode is primarily crystallized. Successively, a capacitance dielectric layer is formed over the lower electrode after primarily crystallized. Successively, the capacitance dielectric layer is secondarily crystallized. Then, an upper electrode is formed over the capacitance dielectric layer.
    Type: Application
    Filed: July 6, 2012
    Publication date: January 10, 2013
    Inventors: Misato Sakamoto, Youichi Yamamoto, Masayuki Tachikawa, Yoshitake Kato