Abstract: A digital frequency-doubling circuit includes a pair of cascaded first delay circuits, each including a plurality of cascaded delays, and a first stage of the cascaded first delay circuits receiving an input signal to be frequency-doubled, and an exclusive-OR circuit receiving the input signal and a delayed output signal outputted from the first stage of the cascaded first delay circuits, for generating a frequency-doubled signal. A delay amount comparator receives a first delayed output signal outputted from a second stage of the cascaded first delay circuits and a second delayed output signal outputted from a second delay circuit of a small delay receiving the first delayed output signal, for performing comparison at a transition timing of the input signal, to discriminate whether the obtained frequency-doubled signal advances or delays in comparison of an optimum duty ratio.