Abstract: Power supply system mounted in electric vehicle includes voltage measurement unit that measures a voltage of each of a plurality of cells to ensure both safety of an electric vehicle and convenience of a user. Current measurement unit therein measures a current flowing through the plurality of cells. Temperature measurement unit therein measures a temperature of the plurality of cells. Controller therein determines a current limit value defining an upper limit of a current for suppressing cell deterioration and ensuring safety based on the voltage, the current, and the temperature of each of the plurality of cells measured by voltage measurement unit, current measurement unit, and temperature measurement unit respectively, and that notifies a higher-level controller in electric vehicle of the determined current limit value.

Abstract: A status signal output circuit outputs a first status signal indicating with a binary level whether or not power the storage unit is normal in accordance with a determination result of the status determination circuit, and, as a second status signal, a pulse width modulation (PWM) signal according to the status of the power storage unit when a measurement circuit including the status determination circuit is normal, or a signal having a axed level when the measurement circuit including the status determination circuit is abnormal. A control signal output circuit outputs, to a drive circuit, a control signal for control to bring a switch inserted between the power storage unit and a load into an OFF state when the power storage unit has abnormality, in accordance with the first status signal and the second status signal output from the status signal output circuit.

Abstract: Power supply system mounted in electric vehicle includes voltage measurement unit that measures a voltage of each of a plurality of cells to ensure both safety of an electric vehicle and convenience of a user. Current measurement unit therein measures a current flowing through the plurality of cells. Temperature measurement unit therein measures a temperature of the plurality of cells. Controller therein determines a current limit value defining an upper limit of a current for suppressing cell deterioration and ensuring safety based on the voltage, the current, and the temperature of each of the plurality of cells measured by voltage measurement unit, current measurement unit, and temperature measurement unit respectively, and that notifies a higher-level controller in electric vehicle of the determined current limit value.

Abstract: A first temperature detector detects a temperature in a high-temperature area and a temperature in a low-temperature area of a power storage unit based on an output value of a first temperature detection element provided at a first position in the high-temperature area and an output value of a temperature detection element provided at a predetermined position in the low-temperature area. A main controller controls charge and discharge based on the temperatures by the first temperature detector. A second temperature detector detects a temperature in the high-temperature area based on an output value of a second temperature detection element provided at a second position in the high-temperature area. A sub-controller controls charge and discharge based on the temperature detected by the second temperature detector during occurrence of an abnormality in the main controller.

Abstract: A status signal output circuit outputs a first status signal indicating with a binary level whether or not power the storage unit is normal in accordance with a determination result of the status determination circuit, and, as a second status signal, a pulse width modulation (PWM) signal according to the status of the power storage unit when a measurement circuit including the status determination circuit is normal, or a signal having a axed level when the measurement circuit including the status determination circuit is abnormal. A control signal output circuit outputs, to a drive circuit, a control signal for control to bring a switch inserted between the power storage unit and a load into an OFF state when the power storage unit has abnormality, in accordance with the first status signal and the second status signal output from the status signal output circuit.

Abstract: A first temperature detector detects a temperature in a high-temperature area and a temperature in a low-temperature area of a power storage unit based on an output value of a first temperature detection element provided at a first position in the high-temperature area and an output value of a temperature detection element provided at a predetermined position in the low-temperature area. A main controller controls charge and discharge based on the temperatures by the first temperature detector. A second temperature detector detects a temperature in the high-temperature area based on an output value of a second temperature detection element provided at a second position in the high-temperature area. A sub-controller controls charge and discharge based on the temperature detected by the second temperature detector during occurrence of an abnormality in the main controller.

Abstract: There is provided a semiconductor test apparatus which uses a test processor to apply a test signal to a DUT having a semiconductor device within it to determine whether the memory is acceptable or not on the basis of a response signal, and uses a repair analysis computing unit to analyze the result of the test to determine how to replace a defective cell of the memory with a spare line. The repair analysis computing unit includes a fail memory which stores test results and a general-purpose repair analysis part which analyzes the test results in accordance with an MRA program and inserts and executes a user function of a user analysis program between units of analysis processing.

Abstract: In a receiving apparatus, two respective reference-point computing units in respective diversity branches calculate reference points on a constellation, and two respective reference-point specifying units in the two diversity branches select respectively the reference points closest to the received data. A diversity circuit receive from the two diversity branches the information specifying the received data and the reference points, and a comparison processing unit compares these reference points. If these reference points are matched, a selection combining unit outputs the reference point while, if not matched, any one of received data selected at random is outputted.

Abstract: There is provided a semiconductor test apparatus which uses a test processor to apply a test signal to a DUT having a semiconductor device within it to determine whether the memory is acceptable or not on the basis of a response signal, and uses a repair analysis computing unit to analyze the result of the test to determine how to replace a defective cell of the memory with a spare line. The repair analysis computing unit includes a fail memory which stores test results and a general-purpose repair analysis part which analyzes the test results in accordance with an MRA program and inserts and executes a user function of a user analysis program between units of analysis processing.

Abstract: In a receiving apparatus, two respective reference-point computing units in respective diversity branches calculate reference points on a constellation, and two respective reference-point specifying units in the two diversity branches select respectively the reference points closest to the received data. A diversity circuit receive from the two diversity branches the information specifying the received data and the reference points, and a comparison processing unit compares these reference points. If these reference points are matched, a selection combining unit outputs the reference point while, if not matched, any one of received data selected at random is outputted.

Abstract: This specification discloses the editing apparatus and generating method for physical conversion definition for generating physical conversion definition for obtaining a logical address from a physical address in semiconductor memory. After setting address parameters relating to contents for setting the physical address and logical address, a plurality of elements whose structural unit is one memory cell of the semiconductor memory or a plurality of memory cells adjacent to each other are set. Furthermore, a logical address is specified to each of these elements. Owing to this, a layout composed of the plurality of elements is generated.