Patents by Inventor Maso Hayashi

Maso Hayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor integrated circuit including a DRAM and an analog circuit
    Publication number: 20060275979
    Abstract: A semiconductor device including an interlayer insulation film formed on a substrate so as to cover first and second regions defined on the substrate, and a capacitor formed over the interlayer insulation film in the first region, wherein the interlayer insulation film includes, in the first region, a stepped part defined by a groove having a bottom surface lower in level than a surface of the interlayer insulation film in the second region.
    Type: Application
    Filed: August 15, 2006
    Publication date: December 7, 2006
    Inventors: Maso Hayashi, Tadaaki Hayashi, Taiji Ema, Narumi Ohkawa