Patents by Inventor Mason A. Jones

Mason A. Jones has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10242744
    Abstract: A method for programming a non-volatile memory device includes concurrently boosting channels of memory cells in a selected memory string and an unselected memory string of the memory device, discharging the boosted channels of the memory cells in the selected memory string, and programming a selected memory cell in the selected memory string after discharging the boosted channels in the selected memory string.
    Type: Grant
    Filed: July 30, 2018
    Date of Patent: March 26, 2019
    Assignee: Micron Technology, Inc.
    Inventors: Violante Moschiano, Akira Goda, Mason A. Jones
  • Publication number: 20180336951
    Abstract: A method for programming a non-volatile memory device includes concurrently boosting channels of memory cells in a selected memory string and an unselected memory string of the memory device, discharging the boosted channels of the memory cells in the selected memory string, and programming a selected memory cell in the selected memory string after discharging the boosted channels in the selected memory string.
    Type: Application
    Filed: July 30, 2018
    Publication date: November 22, 2018
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Violante Moschiano, Akira Goda, Mason A. Jones
  • Patent number: 10037807
    Abstract: A method for programming a non-volatile memory device includes concurrently boosting channels of memory cells in a selected memory string and an unselected memory string of the memory device, discharging the boosted channels of the memory cells in the selected memory string, and programming a selected memory cell in the selected memory string after discharging the boosted channels in the selected memory string.
    Type: Grant
    Filed: August 30, 2017
    Date of Patent: July 31, 2018
    Assignee: Micron Technology, Inc.
    Inventors: Violante Moschiano, Akira Goda, Mason A. Jones
  • Publication number: 20170365343
    Abstract: A method for programming a non-volatile memory device includes concurrently boosting channels of memory cells in a selected memory string and an unselected memory string of the memory device, discharging the boosted channels of the memory cells in the selected memory string, and programming a selected memory cell in the selected memory string after discharging the boosted channels in the selected memory string.
    Type: Application
    Filed: August 30, 2017
    Publication date: December 21, 2017
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Violante Moschiano, Akira Goda, Mason A. Jones
  • Patent number: 9779817
    Abstract: A method for programming a non-volatile memory device includes concurrently boosting channels of memory cells in a selected memory string and an unselected memory string of the memory device, discharging the boosted channels of the memory cells in the selected memory string, and programming a selected memory cell in the selected memory string after discharging the boosted channels in the selected memory string.
    Type: Grant
    Filed: June 16, 2015
    Date of Patent: October 3, 2017
    Assignee: Micron Technology, Inc.
    Inventors: Violante Moschiano, Akira Goda, Mason A. Jones
  • Publication number: 20160372201
    Abstract: A method for programming a non-volatile memory device includes concurrently boosting channels of memory cells in a selected memory string and an unselected memory string of the memory device, discharging the boosted channels of the memory cells in the selected memory string, and programming a selected memory cell in the selected memory string after discharging the boosted channels in the selected memory string.
    Type: Application
    Filed: June 16, 2015
    Publication date: December 22, 2016
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Violante Moschiano, Akira Goda, Mason A. Jones
  • Patent number: 9343168
    Abstract: Method of operating a memory include programming a memory cell and reading the memory cell to determine a programmed threshold voltage of the memory cell. If the programmed threshold voltage is within a threshold voltage distribution of a plurality of threshold voltage distributions, the memory cell is reprogrammed, and if the programmed threshold voltage is not within a threshold voltage distribution of the plurality of threshold voltage distributions, the memory cell is allowed to remain at the programmed threshold voltage.
    Type: Grant
    Filed: August 28, 2014
    Date of Patent: May 17, 2016
    Assignee: Micron Technology, Inc.
    Inventors: Violante Moschiano, Mason Jones
  • Publication number: 20150279472
    Abstract: Embodiments of systems and methods described herein relate to temperature compensation of the sense conditions of memory cells during cross temperatures read operations. One embodiment provides a memory device comprising one or more memory cells, a temperature sensor and a controller coupled to the temperature sensor. The temperature sensor measures a temperature of at least one memory cell. The controller modulates a bit line voltage of the at least one memory cell during a program verify or read operation if the read temperature of the at least one memory cell is different from a first temperature of the memory cell.
    Type: Application
    Filed: March 26, 2014
    Publication date: October 1, 2015
    Applicant: Intel Corporation
    Inventor: Mason Jones
  • Publication number: 20140369117
    Abstract: Method of operating a memory include programming a memory cell and reading the memory cell to determine a programmed threshold voltage of the memory cell. If the programmed threshold voltage is within a threshold voltage distribution of a plurality of threshold voltage distributions, the memory cell is reprogrammed, and if the programmed threshold voltage is not within a threshold voltage distribution of the plurality of threshold voltage distributions, the memory cell is allowed to remain at the programmed threshold voltage.
    Type: Application
    Filed: August 28, 2014
    Publication date: December 18, 2014
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Violante Moschiano, Mason Jones
  • Patent number: 8824203
    Abstract: A method for multiple step programming programs data to an even page of memory cells. The even page of memory cells is read into a page buffer and the uncertain data is removed. An odd page of memory cells is programmed and the data from the even page data from the page buffer is reprogrammed to the even page of memory cells without the uncertain data.
    Type: Grant
    Filed: July 13, 2012
    Date of Patent: September 2, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Violante Moschiano, Mason Jones
  • Patent number: 8773910
    Abstract: Methods for programming and memory devices are disclosed. In one such method for programming, a first programming voltage applied to control gates of a group of memory cells generates a maximum threshold voltage of the group of memory cell threshold voltages. A voltage difference between the maximum threshold voltage and a maximum target voltage is used as a gate step voltage for a second programming voltage. Fast and slow programming memory cells are determined from the distribution resulting from the second programming voltage. An effective gate voltage applied to the control gates of the fast programming memory cells is less than an effective gate voltage applied to the control gates of the slow programming memory cells during the third programming voltage.
    Type: Grant
    Filed: February 25, 2013
    Date of Patent: July 8, 2014
    Assignee: Micron Technology, Inc.
    Inventor: Mason Jones
  • Publication number: 20140016409
    Abstract: A method for multiple step programming programs data to an even page of memory cells. The even page of memory cells is read into a page buffer and the uncertain data is removed. An odd page of memory cells is programmed and the data from the even page data from the page buffer is reprogrammed to the even page of memory cells without the uncertain data.
    Type: Application
    Filed: July 13, 2012
    Publication date: January 16, 2014
    Inventors: Violante Moschiano, Mason Jones
  • Patent number: 8526236
    Abstract: Methods for programming, memory devices, and memory systems are disclosed. In one such method for programming, a target memory cell is partially programmed to a final target programmed state where the partial programming is verified by applying a ramped voltage having a first voltage range (e.g., where the first voltage range is selected in response to program coupling effects from memory cells adjacent to the target memory cell.) A programming operation following the partial programming operation is performed on one or more adjacent memory cells which is then followed by additional programming of the target memory cell to adjust the memory cell from the partially programmed state to the final programmed state. A ramped voltage having a second voltage range different from the first voltage range is utilized to verify the programming of the target memory cell to the final programmed state.
    Type: Grant
    Filed: September 13, 2012
    Date of Patent: September 3, 2013
    Assignee: Micron Technology, Inc.
    Inventor: Mason Jones
  • Patent number: 8385123
    Abstract: Methods for programming and memory devices are disclosed. In one such method for programming, a first programming voltage applied to control gates of a group of memory cells generates a maximum threshold voltage of the group of memory cell threshold voltages. A voltage difference between the maximum threshold voltage and a maximum target voltage is used as a gate step voltage for a second programming voltage. Fast and slow programming memory cells are determined from the distribution resulting from the second programming voltage. An effective gate voltage applied to the control gates of the fast programming memory cells is less than an effective gate voltage applied to the control gates of the slow programming memory cells during the third programming voltage.
    Type: Grant
    Filed: August 18, 2010
    Date of Patent: February 26, 2013
    Assignee: Micron Technology, Inc.
    Inventor: Mason Jones
  • Publication number: 20130010540
    Abstract: Methods for programming, memory devices, and memory systems are disclosed. In one such method for programming, a target memory cell is partially programmed to a final target programmed state where the partial programming is verified by applying a ramped voltage having a first voltage range (e.g., where the first voltage range is selected in response to program coupling effects from memory cells adjacent to the target memory cell.) A programming operation following the partial programming operation is performed on one or more adjacent memory cells which is then followed by additional programming of the target memory cell to adjust the memory cell from the partially programmed state to the final programmed state. A ramped voltage having a second voltage range different from the first voltage range is utilized to verify the programming of the target memory cell to the final programmed state.
    Type: Application
    Filed: September 13, 2012
    Publication date: January 10, 2013
    Inventor: Mason Jones
  • Patent number: 8295095
    Abstract: Methods for programming, memory devices, and memory systems are disclosed. In one such method for programming, a target memory cell is partially programmed to a final target programmed state where the partial programming is verified by applying a ramped voltage having a first voltage range (e.g., where the first voltage range is selected in response to program coupling effects from memory cells adjacent to the target memory cell.) A programming operation following the partial programming operation is performed on one or more adjacent memory cells which is then followed by additional programming of the target memory cell to adjust the memory cell from the partially programmed state to the final programmed state. A ramped voltage having a second voltage range different from the first voltage range is utilized to verify the programming of the target memory cell to the final programmed state.
    Type: Grant
    Filed: April 20, 2010
    Date of Patent: October 23, 2012
    Assignee: Micron Technology, Inc.
    Inventor: Mason Jones
  • Publication number: 20120044768
    Abstract: Methods for programming and memory devices are disclosed. In one such method for programming, a first programming voltage applied to control gates of a group of memory cells generates a maximum threshold voltage of the group of memory cell threshold voltages. A voltage difference between the maximum threshold voltage and a maximum target voltage is used as a gate step voltage for a second programming voltage. Fast and slow programming memory cells are determined from the distribution resulting from the second programming voltage. An effective gate voltage applied to the control gates of the fast programming memory cells is less than an effective gate voltage applied to the control gates of the slow programming memory cells during the third programming voltage.
    Type: Application
    Filed: August 18, 2010
    Publication date: February 23, 2012
    Inventor: Mason Jones
  • Publication number: 20110255341
    Abstract: Methods for programming, memory devices, and memory systems are disclosed. In one such method for programming, a target memory cell is partially programmed to a final target programmed state where the partial programming is verified by applying a ramped voltage having a first voltage range (e.g., where the first voltage range is selected in response to program coupling effects from memory cells adjacent to the target memory cell.) A programming operation following the partial programming operation is performed on one or more adjacent memory cells which is then followed by additional programming of the target memory cell to adjust the memory cell from the partially programmed state to the final programmed state. A ramped voltage having a second voltage range different from the first voltage range is utilized to verify the programming of the target memory cell to the final programmed state.
    Type: Application
    Filed: April 20, 2010
    Publication date: October 20, 2011
    Inventor: Mason Jones
  • Publication number: 20050155042
    Abstract: A framework that allows a transition from a conventional object method invocation model to a services model, where services are explicitly represented and managed before actually being invoked is described. According to one aspect of the invention, a runtime configurable component-based system is described having a plurality of services. Each service includes a set of properties describing the service. The properties include at least, a set of configuration properties to describe functionalities of the service, a lifecycle property to describe a state transition flow of the service for a specific runtime instance, a state property to describe each state in the lifecycle, and a set of dependency properties to describe inter-dependencies of the service with other services of the plurality of services while within a specific state in the lifecycle.
    Type: Application
    Filed: July 2, 2002
    Publication date: July 14, 2005
    Inventors: Michael Kolb, Mason Jones, Steven Hunter