Patents by Inventor Masoud Azmoodeh

Masoud Azmoodeh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11882530
    Abstract: Methods, systems, and devices for wireless communications are described. A user equipment (UE) may operate in a dual-connectivity (DC) configuration, and may measure signals from more than one radio access technology (RAT). The UE may receive a first signal power for a first RAT and a second signal power for a second RAT. The UE may determine a common gain state for the first RAT and the second RAT based on the first signal power and the second signal power. The UE may then apply the common gain state to a first receiver chain within the UE for the first RAT and to a second receiver chain within the UE for the second RAT, where the first receiver chain and the second receiver chain share at least one shared low noise amplifier (LNA).
    Type: Grant
    Filed: December 11, 2020
    Date of Patent: January 23, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Harish Venkatachari, Paolo Minero, Rui Li, Qian Ma, Antriksh Pany, Masoud Azmoodeh, Yu Fu, Ashwin Alur Sreesha, Rimal Patel, Arpit Chitransh
  • Publication number: 20230007601
    Abstract: Methods, systems, and devices for wireless communications are described. A user equipment (UE) may operate in a dual-connectivity (DC) configuration, and may measure signals from more than one radio access technology (RAT). The UE may receive a first signal power for a first RAT and a second signal power for a second RAT. The UE may determine a common gain state for the first RAT and the second RAT based on the first signal power and the second signal power. The UE may then apply the common gain state to a first receiver chain within the UE for the first RAT and to a second receiver chain within the UE for the second RAT, where the first receiver chain and the second receiver chain share at least one shared low noise amplifier (LNA).
    Type: Application
    Filed: December 11, 2020
    Publication date: January 5, 2023
    Inventors: Harish VENKATACHARI, Paolo MINERO, Rui LI, Qian MA, Antriksh PANY, Masoud AZMOODEH, Yu FU, Ashwin ALUR SREESHA, Rimal PATEL, Arpit CHITRANSH
  • Publication number: 20160198352
    Abstract: Methods and devices are disclosed for managing diversity tune-away on a wireless communication device configured with at least two radio frequency (RF) receive resources associated with a connection in a high speed data network. The wireless device may monitor data communications and downlink channel conditions in the high speed data network, and determine whether a diversity tune-away mode has been entered. Upon determining that the diversity tune-away mode has been entered, the wireless device may perform a deliberate acknowledgment procedure by ignoring normal error detection for received data and sending an acknowledgment message for the received data to the high speed data network. The wireless device may determine whether the diversity tune-away mode has ended, and in response to determining that the diversity tune-away mode has ended, and halt the deliberate acknowledgment procedure in response to determining that the diversity tune-away mode has ended.
    Type: Application
    Filed: June 17, 2015
    Publication date: July 7, 2016
    Inventors: Ali Jarrahi Khameneh, Chintan Shirish Shah, Aziz Gholmieh, Mohammadamin Farajzadehjalali, Saket Bathwal, Reza Shahidi, Masoud Azmoodeh
  • Patent number: 7180347
    Abstract: Systems and methods are disclosed for minimizing nth-order harmonic associated with a square wave clock signal having a predetermined frequency and duty cycle. The system changes the duty cycle of the clock to eliminate or suppress the nth-order harmonic of the clock; and generates a low-interference clock having the changed duty cycle while keeping the predetermined frequency.
    Type: Grant
    Filed: December 6, 2005
    Date of Patent: February 20, 2007
    Inventor: Masoud Azmoodeh
  • Publication number: 20060181321
    Abstract: Systems and methods are disclosed for minimizing nth-order harmonic associated with a square wave clock signal having a predetermined frequency and duty cycle. The system changes the duty cycle of the clock to eliminate or suppress the nth-order harmonic of the clock; and generates a low-interference clock having the changed duty cycle while keeping the predetermined frequency.
    Type: Application
    Filed: December 6, 2005
    Publication date: August 17, 2006
    Inventor: Masoud Azmoodeh
  • Patent number: 7091762
    Abstract: Systems and methods are disclosed for minimizing nth-order harmonic associated with a square wave clock signal having a predetermined frequency and a duty cycle. The system changes the duty cycle of the clock to eliminate or suppress the nth-order harmonic of the clock; and generates a low-interference clock having the changed duty cycle while keeping the predetermined frequency.
    Type: Grant
    Filed: October 9, 2001
    Date of Patent: August 15, 2006
    Assignee: Gallitzin Allegheny LLC
    Inventor: Masoud Azmoodeh
  • Publication number: 20030080792
    Abstract: Systems and methods are disclosed for minimizing nth-order harmonic associated with a square wave clock signal having a predetermined frequency and a duty cycle. The system changes the duty cycle of the clock to eliminate or suppress the nth-order harmonic of the clock; and generates a low-interference clock having the changed duty cycle while keeping the predetermined frequency.
    Type: Application
    Filed: October 9, 2001
    Publication date: May 1, 2003
    Inventor: Masoud Azmoodeh