Abstract: An apparatus can implement a frequency doubler with duty cycle correction in conjunction with, for instance, a phase-locked loop (PLL) to decrease phase noise. In an example aspect, an apparatus has a frequency doubler including a signal combiner, a first signal pathway, and a second signal pathway. The frequency doubler also includes a doubler input node and a doubler output node. The signal combiner is coupled to the doubler output node. The first signal pathway is coupled between the doubler input node and the signal combiner and includes a first adjustable delay cell. The second signal pathway is also coupled between the doubler input node and the signal combiner and includes a second adjustable delay cell.

Abstract: A phase-locked loop (PLL) may include a phase-frequency detector (PFD), a phase interpolation (PI)-based sampler, a loop filter, a voltage-controlled oscillator (VCO), and a fractional frequency divider. The PFD output corresponds to a phase error between a reference clock signal and a feedback signal. The PI-based sampler produces a slope signal in response to the PFD output, and adjusts the slope signal in response to a quantization error correction indication. The PI-based sampler also samples the slope signal. The loop filter produces a VCO control signal in response to a sampled slope signal. The VCO control signal controls the VCO frequency. The fractional frequency divider circuit divides the frequency of the VCO output signal and also determines the quantization error correction corresponding to the quantization error introduced by fractional division of the frequency of the VCO output signal.

Abstract: An apparatus implements a multiplying delay-locked loop (MDLL) including a sampler to be calibrated. In an example aspect, an apparatus includes an MDLL and a sampler calibrator. The MDLL includes a locked-loop feedforward path with a sampler, a control output, a feedback input, and a reference input coupled to a reference signal source. The MDLL also includes a VCO, a multiplexer, and a divider. The VCO includes a VCO input, a VCO output, and a control input coupled to the control output. The multiplexer includes a first input coupled to the reference signal source, a second input coupled to the VCO output, and an output coupled to the VCO input. The divider is coupled between the VCO output and the feedback input. The sampler calibrator includes a first input coupled to the reference signal source, a second input coupled to the VCO output, and an output coupled to the sampler.

Abstract: A phase-locked loop (PLL) may include a phase-frequency detector (PFD), a phase interpolation (PI)-based sampler, a loop filter, a voltage-controlled oscillator (VCO), and a fractional frequency divider. The PFD output corresponds to a phase error between a reference clock signal and a feedback signal. The PI-based sampler produces a slope signal in response to the PFD output, and adjusts the slope signal in response to a quantization error correction indication. The PI-based sampler also samples the slope signal. The loop filter produces a VCO control signal in response to a sampled slope signal. The VCO control signal controls the VCO frequency. The fractional frequency divider circuit divides the frequency of the VCO output signal and also determines the quantization error correction corresponding to the quantization error introduced by fractional division of the frequency of the VCO output signal.

Abstract: In certain aspects, a sampler includes a sampling capacitor, a precharge switch coupled to the sampling capacitor, one or more discharge circuits coupled to the sampling capacitor, and a reference-voltage circuit coupled to the sampling capacitor. The reference-voltage circuit is configured to generate a reference voltage based on a supply voltage, and generate a voltage difference between a voltage on the sampling capacitor and the reference voltage.

Abstract: An apparatus can implement a frequency doubler with duty cycle correction in conjunction with, for instance, a phase-locked loop (PLL) to decrease phase noise. In an example aspect, an apparatus has a frequency doubler including a signal combiner, a first signal pathway, and a second signal pathway. The frequency doubler also includes a doubler input node and a doubler output node. The signal combiner is coupled to the doubler output node. The first signal pathway is coupled between the doubler input node and the signal combiner and includes a first adjustable delay cell. The second signal pathway is also coupled between the doubler input node and the signal combiner and includes a second adjustable delay cell.

Abstract: An apparatus implements a multiplying delay-locked loop (MDLL) including a sampler to be calibrated. In an example aspect, an apparatus includes an MDLL and a sampler calibrator. The MDLL includes a locked-loop feedforward path with a sampler, a control output, a feedback input, and a reference input coupled to a reference signal source. The MDLL also includes a VCO, a multiplexer, and a divider. The VCO includes a VCO input, a VCO output, and a control input coupled to the control output. The multiplexer includes a first input coupled to the reference signal source, a second input coupled to the VCO output, and an output coupled to the VCO input. The divider is coupled between the VCO output and the feedback input. The sampler calibrator includes a first input coupled to the reference signal source, a second input coupled to the VCO output, and an output coupled to the sampler.

Abstract: A low-pass filter having a notch frequency due to a resonance between a mutual inductance of inductive elements and a capacitance. An exemplary low-pass filter generally includes a first inductive element having a first terminal and a second terminal, the first terminal being coupled to the input port, and a second inductive element having a first terminal and a second terminal, the first terminal of the second inductive element being coupled to the second terminal of the first inductive element and the second terminal of the second inductive element being coupled to the output port. The filter also includes a shunt capacitive element coupled to the second terminal of the first inductive element, wherein a mutual inductance between the first inductive element and the second inductive element and a capacitance of the shunt capacitive element are configured to have a resonance providing a notch frequency for the low-pass filter.

Abstract: A low-pass filter having a notch frequency due to a resonance between a mutual inductance of inductive elements and a capacitance. An exemplary low-pass filter generally includes a first inductive element having a first terminal and a second terminal, the first terminal being coupled to the input port, and a second inductive element having a first terminal and a second terminal, the first terminal of the second inductive element being coupled to the second terminal of the first inductive element and the second terminal of the second inductive element being coupled to the output port. The filter also includes a shunt capacitive element coupled to the second terminal of the first inductive element, wherein a mutual inductance between the first inductive element and the second inductive element and a capacitance of the shunt capacitive element are configured to have a resonance providing a notch frequency for the low-pass filter.

Abstract: An apparatus is disclosed that implements a sampling phase-locked loop. In an example aspect, the apparatus includes a phase frequency detector, a relative phase signal determiner, a voltage-controlled oscillator (VCO), and a feedback path. The phase frequency detector is configured to produce a phase indication signal based on a reference signal and a feedback signal. The relative phase signal determiner is coupled to the phase frequency detector and includes a sampler. The relative phase signal determiner is configured to determine a relative phase signal based on the phase indication signal using the sampler. The VCO is coupled to the relative phase signal determiner and is configured to produce an oscillating signal based on the relative phase signal. The feedback path is disposed between the VCO and the phase frequency detector. The feedback path is configured to provide the feedback signal to the phase frequency detector using the oscillating signal.

Abstract: The present disclosure describes aspects of a switchable inductor network for wideband circuits. In some aspects, the switchable inductor network provides selectable inductance. The switchable inductor network includes a first coil and a second coil that includes a first inductive segment and a second inductive segment. Connection points of the second coil connect the second coil across a portion of the first coil. The switchable inductor network also includes a switch connected between the first inductive segment and the second inductive segment of the second coil. The switch is configured to change the selectable inductance of the switchable inductor network by selectively coupling the first inductive segment to the second inductive segment of the second coil in response to a control signal.

Abstract: The present disclosure describes aspects of degeneration for a wideband voltage-controlled oscillator (VCO) circuit. In some aspects, the VCO circuit includes a degeneration network that includes a first inductor, a second inductor, and a capacitor. The degeneration network is connected between the a supply voltage and ground, with the capacitor connected across the differential VCO, between the sources of cross-coupled PMOS transistors and the sources of cross-coupled NMOS transistors. Control circuitry selects an inductance value of a switched inductance network to select a frequency band in which the VCO circuit operates. The control circuitry also sets a switched capacitor bank and a variable capacitor bank to tune the VCO circuit to an operating frequency within the selected frequency band. The control circuitry further tunes the degeneration network to degenerate the VCO circuit to reduce phase noise in an output signal of the VCO circuit.

Abstract: The present disclosure describes aspects of a switchable inductor network for wideband circuits. In some aspects, the switchable inductor network provides selectable inductance. The switchable inductor network includes a first coil and a second coil that includes a first inductive segment and a second inductive segment. Connection points of the second coil connect the second coil across a portion of the first coil. The switchable inductor network also includes a switch connected between the first inductive segment and the second inductive segment of the second coil. The switch is configured to change the selectable inductance of the switchable inductor network by selectively coupling the first inductive segment to the second inductive segment of the second coil in response to a control signal.

Abstract: The present disclosure describes aspects of degeneration for a wideband voltage-controlled oscillator (VCO) circuit. In some aspects, the VCO circuit includes a degeneration network that includes a first inductor, a second inductor, and a capacitor. The degeneration network is connected between the a supply voltage and ground, with the capacitor connected across the differential VCO, between the sources of cross-coupled PMOS transistors and the sources of cross-coupled NMOS transistors. Control circuitry selects an inductance value of a switched inductance network to select a frequency band in which the VCO circuit operates. The control circuitry also sets a switched capacitor bank and a variable capacitor bank to tune the VCO circuit to an operating frequency within the selected frequency band. The control circuitry further tunes the degeneration network to degenerate the VCO circuit to reduce phase noise in an output signal of the VCO circuit.

Abstract: A dual-band voltage controlled oscillator (VCO) includes: a first oscillator circuit including a first inductor; a second oscillator circuit including a second inductor; a first mode switch configured to electrically connect or disconnect a first output terminal of the first oscillator circuit and a first output terminal of the second oscillator circuit; a second mode switch configured to electrically connect or disconnect a second output terminal of the first oscillator circuit and a second output terminal of the second oscillator circuit; a third mode switch configured to electrically connect or disconnect a first terminal of the first inductor and a first terminal of the second inductor; and a fourth mode switch configured to electrically connect or disconnect a second terminal of the first inductor and a second terminal of the second inductor.

Abstract: Certain aspects of the present disclosure generally relate to a voltage-controlled oscillator (VCO) that is configurable (e.g., in a dynamic manner) in multiple modes of operation (e.g., low/high-band modes). The VCO may include a resonant circuit coupled to a plurality of switches that may be used to adjust current flow within one or more inductive elements of the resonant circuit. By adjusting the current flow within the inductive elements, an inductance of the resonant circuit may be adjusted, which in turn adjusts a band of the VCO.

Abstract: A dual-band voltage controlled oscillator (VCO) includes: a first oscillator circuit including a first inductor; a second oscillator circuit including a second inductor; a first mode switch configured to electrically connect or disconnect a first output terminal of the first oscillator circuit and a first output terminal of the second oscillator circuit; a second mode switch configured to electrically connect or disconnect a second output terminal of the first oscillator circuit and a second output terminal of the second oscillator circuit; a third mode switch configured to electrically connect or disconnect a first terminal of the first inductor and a first terminal of the second inductor; and a fourth mode switch configured to electrically connect or disconnect a second terminal of the first inductor and a second terminal of the second inductor.