Patents by Inventor Masound Zargari

Masound Zargari has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6731176
    Abstract: The present invention provides a synthesizer having an efficient lock detect signal generator, an extended range VCO that can operate within any one of a plurality of adjacent characteristic curves defined by a plurality of adjacent regions, and a divide circuit implemented using only a single counter along with a decoder. This allows for a method of operating the synthesizer, methods of establishing or reestablishing a lock condition using the extended range VCO, and a method of designing a plurality of divide circuits which each use the same single counter and each use a different decoder.
    Type: Grant
    Filed: March 13, 2002
    Date of Patent: May 4, 2004
    Assignee: Atheros Communications, Inc.
    Inventors: David K. Su, Chik Patrick Yue, David J. Weber, Masound Zargari
  • Patent number: 6570453
    Abstract: The present invention provides a synthesizer having an efficient lock detect signal generator, an extended range VCO that can operate within any one of a plurality of adjacent characteristic curves defined by a plurality of adjacent regions, and a divide circuit implemented using only a single counter along with a decoder. This allows for a method of operating the synthesizer, methods of establishing or reestablishing a lock condition using the extended range VCO, and a method of designing a plurality of divide circuits which each use the same single counter and each use a different decoder.
    Type: Grant
    Filed: March 13, 2002
    Date of Patent: May 27, 2003
    Assignee: Atheros Communications, Inc.
    Inventors: David K. Su, Chik Patrick Yue, David J. Weber, Masound Zargari
  • Patent number: 6404289
    Abstract: The present invention provides a synthesizer having an efficient lock detect signal generator, an extended range VCO that can operate within any one of a plurality of adjacent characteristic curves defined by a plurality of adjacent regions, and a divide circuit implemented using only a single counter along with a decoder. This allows for a method of operating the synthesizer, methods of establishing or reestablishing a lock condition using the extended range VCO, and a method of designing a plurality of divide circuits which each use the same single counter and each use a different decoder.
    Type: Grant
    Filed: December 22, 2000
    Date of Patent: June 11, 2002
    Assignee: Atheros Communications, Inc.
    Inventors: David K. Su, Chik Patrick Yue, David J. Weber, Masound Zargari