Patents by Inventor Massahiro Fusumada

Massahiro Fusumada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Self test circuit for a semiconductor intergrated circuit
    Patent number: 7730374
    Abstract: A semiconductor integrated circuit that self-tests the skew margin of the clock and data signals in an LVDS. A clock signal CKB1 is held in flip-flop circuit 105 synchronously with checking clock signal A1. Checking pattern signal PAT_A is held in flip-flop circuit 104 synchronously with checking clock signal A2. When the skew margin of clock signal CKA_IN and data signal DA_IN are checked, the checking signal TCKA of flip-flop circuit 105 is input instead of clock signal CKA_IN, and the checking signal TDA of flip-flop circuit 104 is input instead of clock signal DA_IN. The timing relationship between clock signal CKB7 and checking timing signal A1 and the timing relationship between clock signal CKB7 and checking timing signal A2 are controlled independently by timing control circuit 109.
    Type: Grant
    Filed: November 1, 2006
    Date of Patent: June 1, 2010
    Assignee: Texas Instruments Incorporated
    Inventors: Massahiro Fusumada, Hitoshi Saitoh, Shinji Togashi, Akira Yano
  • SELF TEST CIRCUIT FOR A SEMICONDUCTOR INTERGRATED CIRCUIT
    Publication number: 20070118784
    Abstract: A semiconductor integrated circuit that self-tests the skew margin of the clock and data signals in an LVDS. A clock signal CKB1 is held in flip-flop circuit 105 synchronously with checking clock signal A1. Checking pattern signal PAT_A is held in flip-flop circuit 104 synchronously with checking clock signal A2. When the skew margin of clock signal CKA_IN and data signal DA_IN are checked, the checking signal TCKA of flip-flop circuit 105 is input instead of clock signal CKA_IN, and the checking signal TDA of flip-flop circuit 104 is input instead of clock signal DA_IN. The timing relationship between clock signal CKB7 and checking timing signal A1 and the timing relationship between clock signal CKB7 and checking timing signal A2 are controlled independently by timing control circuit 109.
    Type: Application
    Filed: November 1, 2006
    Publication date: May 24, 2007
    Applicant: TEXAS INSTRUMENTS, INCORPORATED
    Inventors: Massahiro Fusumada, Hitoshi Saitoh, Shinji Togashi, Akira Yano