Abstract: A cyclic analog to digital converter for digitizing an output from a photoplethysmography sensor has a buffer amplifier for setting a voltage of the feedback capacitance. Additionally, digital averaging circuit is preferably provided for averaging the digital output from the cyclic analog to digital converter for the several conversions. Finally, voting logic is additionally provided for declaring the digital bits based on successive comparisons by the one or more comparators.

Abstract: The present invention relates to a timepiece comprising: a mechanical power source coupled to a time indicating display, a generator, wherein the mechanical power source is coupled to the generator, a regulator circuit configured for enslaving a generator frequency of the generator to a reference frequency, wherein the regulator circuit is configured for electrically braking the generator when the generator frequency is higher than the reference frequency, wherein the regulator circuit comprises: at least a first switch, at least a first inductor and at least a first capacitor, wherein the first switch and the first capacitor are arranged parallel to each other and wherein the first switch and the first capacitor are arranged in series with the first inductor.

Abstract: The present invention relates to an energy harvesting circuit for harvesting energy from at least one energy source.

Abstract: The present invention relates to an energy harvesting circuit for harvesting energy from at least one energy source.

Abstract: The present invention relates to a timepiece comprising: a mechanical power source coupled to a time indicating display, a generator, wherein the mechanical power source is coupled to the generator, a regulator circuit configured for enslaving a generator frequency of the generator to a reference frequency, wherein the regulator circuit is configured for electrically braking the generator when the generator frequency is higher than the reference frequency, wherein the regulator circuit comprises: at least a first switch, at least a first inductor and at least a first capacitor, wherein the first switch and the first capacitor are arranged parallel to each other and wherein the first switch and the first capacitor are arranged in series with the first inductor.

Abstract: The present invention concerns a drive circuit for driving an oscillator. The drive circuit comprises a first inductor comprising a first terminal and a second terminal; an electrical energy source connected to the first terminal; and a switching circuit connected to the second terminal and to the oscillator. The switching circuit is configured to operate at least in an off state, where it is configured not to feed electrical energy to the oscillator, and in an on state, where it is configured to feed electrical energy to the oscillator. The first inductor is arranged to store energy in its magnetic field when the switching circuit is in the off state, and, when the switching circuit is in the on state, the switching circuit is arranged to use at least some of the energy stored in the magnetic field to deliver a surge of current from the electrical energy source to the oscillator.

Abstract: The present invention concerns a drive circuit for driving an oscillator. The drive circuit comprises a first inductor comprising a first terminal and a second terminal; an electrical energy source connected to the first terminal; and a switching circuit connected to the second terminal and to the oscillator. The switching circuit is configured to operate at least in an off state, where it is configured not to feed electrical energy to the oscillator, and in an on state, where it is configured to feed electrical energy to the oscillator. The first inductor is arranged to store energy in its magnetic field when the switching circuit is in the off state, and, when the switching circuit is in the on state, the switching circuit is arranged to use at least some of the energy stored in the magnetic field to deliver a surge of current from the electrical energy source to the oscillator.

Abstract: The present invention relates to a digital interpolator, comprising an input to receive an input signal at a first clock frequency and comprising an output to provide an interpolated signal at a second clock frequency larger than the first clock frequency. The interpolator comprises a differentiator connected to the input, an interpolator stage connected to a differentiator output, and an integrator connected to the output and connected to an output of the interpolator stage.

Abstract: The electronic device is arranged for generation of an audible alarm or music. It includes a coil or inductor and a buzzer provided with a capacitor connected in series with the coil. When the electronic device is actuated, the buzzer generates the audible alarm or music. The electronic device further includes, in a feedback loop, a derivative circuit connected to a connection node between the coil and the capacitor, to produce a derivative of the signal from the capacitor, and a comparator for comparing a derivative signal from the derivative circuit with a reference voltage. The comparator supplies an output signal to the coil to amplify the signal across the capacitor, so that the buzzer generates at least one audible alarm.

Abstract: The electronic device is arranged for generation of an audible alarm or music. It includes a coil or inductor and a buzzer provided with a capacitor connected in series with the coil. When the electronic device is actuated, the buzzer generates the audible alarm or music. The electronic device further includes, in a feedback loop, a derivative circuit connected to a connection node between the coil and the capacitor, to produce a derivative of the signal from the capacitor, and a comparator for comparing a derivative signal from the derivative circuit with a reference voltage. The comparator supplies an output signal to the coil to amplify the signal across the capacitor, so that the buzzer generates at least one audible alarm.

Abstract: The present invention relates to a digital interpolator, comprising an input to receive an input signal at a first clock frequency and comprising an output to provide an interpolated signal at a second clock frequency larger than the first clock frequency. The interpolator comprises a differentiator connected to the input, an interpolator stage connected to a differentiator output, and an integrator connected to the output and connected to an output of the interpolator stage.