Abstract: A memory cell sensing circuit to sense data from a memory cell includes a reference memory cell coupled to pass a reference current. A sense amplifier has a first input and a second input coupled to a bias circuit of the data memory cell. A first mirror mirrors the reference current to a voltage coupled to the first input of the sense amplifier. A second mirror mirrors the reference current to a voltage coupled to the bias circuit of the data memory cell. A third mirror mirrors the reference current to a voltage coupled to the second input of the sense amplifier through a pass gate.

Abstract: A DAC-based voltage regulator system for a non-volatile memory device comprises a charge pump circuit having an enable input and a voltage output node. A voltage-to-current converter has an input coupled to the voltage output node and an output coupled to a virtual ground node. A current source is coupled to the virtual ground node and sinks one of a plurality of currents in response to states of a plurality of digital input signals. A transconductance amplifier has an inverting input at the virtual ground node, a non-inverting input coupled to a reference voltage potential, and an output. A comparator has a first input coupled to the output of the transconductance amplifier, a second input coupled to a reference voltage potential, and an output coupled to the enable input of said charge pump.

Abstract: Described herein is a nonvolatile memory comprising an input pin receiving an external clock signal supplied by a user; an input buffer receiving the external clock signal and supplying an intermediate clock signal delayed with respect to the external clock signal; and a delay locked loop receiving the intermediate clock signal and supplying an internal clock signal distributed within the nonvolatile memory and substantially in phase with the external clock signal.