Abstract: A superlens that includes, in one example embodiment, a positive-index material adjacent to a negative-index material, wherein the negative-index material includes aluminum. In a more specific embodiment, the positive-index material includes a dielectric layer, such as Poly(Methyl MethAcrylate) (PMMA), which is less than 50 nanometers thick. The negative-index material includes a smoothed aluminum layer less than 50 nanometers thick. The aluminum layer is disposed on the dielectric layer or vice versa, forming a superlens comprising the aluminum layer and the dielectric layer. In another embodiment, the superlens further includes plural aluminum layers separated by one or more layers of positive-index material. A mask is adjacent to the positive-index material. The mask may include one or more features that extend into a transparent substrate. The mask is positioned so that the positive-index material separates the mask from the smoothed aluminum layer.

Abstract: A contained resonant cavity. The contained resonant cavity includes a first surface and a second surface that are partially transmissive and partially reflective, One or more reflective sidewall, are positioned between the first surface and the second surface. In a specific embodiment, the first surface and the second surface are substantially parallel and represent input and output surfaces, respectively, of the contained resonant cavity. The one or more sidewalls are approximately perpendicular to the first surface and the second surface and include a first sidewall having a first substantially reflective planar surface that faces a second substantially reflective planar surface of the second sidewall. A third sidewall and a fourth sidewall have fourth and fifth substantially reflective Lacing sidewalls, respectively.

Abstract: A contained resonant cavity. The contained resonant cavity includes a first surface and a second surface that are partially transmissive and partially reflective. One or more reflective sidewalls are positioned between the first surface and the second surface. In a specific embodiment, the first surface and the second surface are substantially parallel and represent input and output surfaces, respectively, of the contained resonant cavity. The one or more sidewalls are approximately perpendicular to the first surface and the second surface and include a first sidewall having a first substantially reflective planar surface that faces a second substantially reflective planar surface of the second sidewall. A fourth sidewall and a fifth sidewall have fourth and fifth substantially reflective facing sidewalls, respectively.

Abstract: An apparatus for carrying out asynchronous communication among integrated circuits for inter-chip communications includes a plurality of senders disposed on an integrated circuit. Each is associated with send-initiate circuitry to indicate a request to send the occurrence of an event. The occurrence of an event causes the sender to transition from a no-event-occurred state to an event-occurred state. An address-generating circuit for generating a unique address is associated with each sender. The send-initiate circuitry of each sender is connected to an arbiter circuit. The arbiter circuit resolves simultaneous requests to send by more than one sender and provides a send-enable signal to the winning contending sender. The send-enable signal resets the selected sender to its no-event-occurred state. The send-enable signal causes the address-generating circuit associated with the winning contending sender to generate the address of that sender and place it on an output bus along with an output-enable signal.

Abstract: A CMOS single phase register includes two pairs of cross coupled CMOS inverters connected together by transistor switches. The first pair of cross-coupled CMOS inverters is connected to a complementary pair of data inputs through a first pair of transistor switches which turn on in response to a first logic level. The complementary outputs of the first pair of cross-coupled CMOS inverters is connected to the inputs of the second pair of cross-coupled CMOS inverters through a second pair of transistor switches which turn on in response to a second logic level. The complementary outputs of the CMOS single phase register of the present invention are the outputs of the second pair of cross-coupled CMOS inverters. The ground connections of the first pair of cross-coupled CMOS inverters is made through a transistor switch which turns on in response to the first logic level.

Abstract: An integrated sensor and analog processor for visual images is produced from an array of photoreceptor signals that are the space-time derivative of the photoreceptor outputs. Each photoreceptor output V.sub.R is first processed by an integrator having a predetermined time constant using a differential transconductance amplifier driving an integrating capacitor, and feeding the output signals V.sub.H back to the negative input, thereby generating a time integrated signal for each pixel of the array. The output terminal of the integrating amplifier is connected to a node that is coupled to the outputs of similar integrators of neighboring pixels by resistive connections thereby forming a spatially smoothed version of the image. At each node a differential amplifier takes the difference between the node potential and local receptor potential, whereby an output representing a first temporal derivative and second spatial derivative is computed.