Abstract: A circuit includes a digital-to-analog converter (DAC) configured to receive a binary input signal and to provide an output voltage that corresponds to a magnitude of the binary input signal. The circuit further includes a transconductance stage configured to receive the output voltage from the DAC and to generate a DAC current based on a magnitude of the output voltage. The circuit also includes an auxiliary current generator configured to generate an auxiliary current. The DAC current and the auxiliary current are summed together to produce an output current.

Abstract: A front-end electronic circuitry for a photon counting application includes a charge sensitive amplifier including an amplifier circuit and a capacitor being arranged in a feedback path between the input side and the output side of the amplifier circuit. A controllable switch is arranged in parallel to the capacitor. The circuitry includes a delay circuit to provide a delay circuit output signal being a time-delayed representation of the charge sensitive amplifier output signal. An output signal generation circuit is configured to generate the output signal by subtracting the delay circuit output signal from the charge sensitive amplifier output signal.

Abstract: A circuit includes a digital-to-analog converter (DAC) configured to receive a binary input signal and to provide an output voltage that corresponds to a magnitude of the binary input signal. The circuit further includes a transconductance stage configured to receive the output voltage from the DAC and to generate a DAC current based on a magnitude of the output voltage. The circuit also includes an auxiliary current generator configured to generate an auxiliary current. The DAC current and the auxiliary current are summed together to produce an output current.

Abstract: Disclosed herein are devices, systems, and methods for baseline restoration. An electric circuitry for baseline restoration includes a baseline sampling circuit for providing a baseline output signal representing a baseline level of an input signal, and an integrator circuit to receive an error signal representing an error of the baseline level of the input signal and to provide an integrator output signal being a representation of an integration of the error signal. The electric circuitry further includes a digitization circuit to provide a digital output signal being a digital representation of the integrator output signal, and an output stage to provide a baseline restoration output signal representing a corrected baseline level of the input signal.

Abstract: A digital to analogue voltage converter (DAC) comprising: a first resistor string having a plurality of resistors; and a plurality of DAC stages, each DAC stage coupled to said first resistor string and comprising: a voltage buffer; a first switching stage coupled to the first resistor string, the first switching stage configured to provide an input to the voltage buffer in dependence on receiving a first sub-word of a digital input; a second resistor string having one or more resistors, wherein a first end of the second resistor string is coupled to a current source and a second end of the second resistor string is coupled to an output of the voltage buffer; and a second switching stage coupled to the second resistor string and configured to provide an output of the DAC stage in dependence on receiving a second sub-word of the digital input.

Abstract: A front-end electronic circuitry for a photon counting application includes a charge sensitive amplifier including an amplifier circuit and a capacitor being arranged in a feedback path between the input side and the output side of the amplifier circuit. A controllable switch is arranged in parallel to the capacitor. The circuitry includes a delay circuit to provide a delay circuit output signal being a time-delayed representation of the charge sensitive amplifier output signal. An output signal generation circuit is configured to generate the output signal by subtracting the delay circuit output signal from the charge sensitive amplifier output signal.

Abstract: A voltage-controlled ring oscillator (VCRO) and a VCRO-based sigma delta modulator having capability of enabling and disabling the VCRO cells. A VCRO includes a plurality of inverters coupled in a ring and a transition detector. The transition detector detects a transition of a first inverter and sends a control signal to enable a second inverter if the transition of the first inverter is detected. The transition detector may include a comparator configured to compare an input and an output of an inverter(s) to detect the transition of the first inverter and a latch configured to hold the control signal until it is reset.

Abstract: A voltage-controlled ring oscillator (VCRO) and a VCRO-based sigma delta modulator having capability of enabling and disabling the VCRO cells. A VCRO includes a plurality of inverters coupled in a ring and a transition detector. The transition detector detects a transition of a first inverter and sends a control signal to enable a second inverter if the transition of the first inverter is detected. The transition detector may include a comparator configured to compare an input and an output of an inverter(s) to detect the transition of the first inverter and a latch configured to hold the control signal until it is reset.

Abstract: Sigma-delta converters having a sampling circuit are provided. The sampling circuit is actuated such that sampling times are at least partially random.

Abstract: Sigma-delta converters having a sampling circuit are provided. The sampling circuit is actuated such that sampling times are at least partially random.

Abstract: A sigma delta analog to digital converter for converting an analog input into a digital output comprises a reference path for receiving a reference voltage. The reference path comprises a digital to analog converter. The digital to analog converter comprises a reference voltage input for receiving the reference voltage, wherein the reference voltage input comprises two contacts and wherein each contact is a beginning of a voltage line of two voltage lines. The digital to analog converter comprises a plurality of switches and a plurality of capacitors. The switches of the plurality of switches are configured to connect the digital to analog converter in a sampling phase with the reference voltage and to disconnect the digital to analog converter in an integrating phase from the reference voltage.

Abstract: A sigma delta analog to digital converter for converting an analog input into a digital output comprises a reference path for receiving a reference voltage. The reference path comprises a digital to analog converter. The digital to analog converter comprises a reference voltage input for receiving the reference voltage, wherein the reference voltage input comprises two contacts and wherein each contact is a beginning of a voltage line of two voltage lines. The digital to analog converter comprises a plurality of switches and a plurality of capacitors. The switches of the plurality of switches are configured to connect the digital to analog converter in a sampling phase with the reference voltage and to disconnect the digital to analog converter in an integrating phase from the reference voltage.

Abstract: Electric compressor comprising a compression cylinder and the respective head, a valve plate arranged between the head and the body of said cylinder and provided with a gas inlet opening, a silencer arranged at the inlet side of said opening and comprising an elongated portion with an aperture adapted to fit in with said opening. The head is provided externally with a concave recess which is laterally open towards the inner cavity of the compressor, said elongated portion of the silencer being firmly housed in said recess so that the aperture engages the opening in the valve plate in an air-tight, sealed manner. In said recess there is provided a hollow space between said elongated portion and the outer wall, said hollow space being adapted to accommodate an elastic element for locking the silencer in place.