Patents by Inventor Massimo Rossini
Massimo Rossini has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11615846Abstract: Described are systems and methods for estimating the resistance-capacitance time constant of an electrical circuit (e.g., of a wordline of a memory device). An example system comprises: a memory device comprising a plurality of memory cells electrically coupled to a plurality of wordlines; a resistance-capacitance (RC) measurement circuit to measure a voltage at a specified wordline of the plurality of wordlines; and a processing device coupled to the memory device. The processing device is configured to: apply an initial voltage to a selected wordline of the plurality of wordlines; discharge the selected wordline for a discharge period of time; float the selected wordline until a voltage at the selected wordline is stabilized; determine, by the RC measurement circuit, a stabilized voltage at the selected wordline; and estimate, based on the stabilized voltage, an RC time constant of the wordline.Type: GrantFiled: June 3, 2022Date of Patent: March 28, 2023Assignee: Micron Technology, Inc.Inventors: Huanyou Zhan, Massimo Rossini, Jun Xu
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Publication number: 20220293182Abstract: Described are systems and methods for estimating the resistance-capacitance time constant of an electrical circuit (e.g., of a wordline of a memory device). An example system comprises: a memory device comprising a plurality of memory cells electrically coupled to a plurality of wordlines; a resistance-capacitance (RC) measurement circuit to measure a voltage at a specified wordline of the plurality of wordlines; and a processing device coupled to the memory device. The processing device is configured to: apply an initial voltage to a selected wordline of the plurality of wordlines; discharge the selected wordline for a discharge period of time; float the selected wordline until a voltage at the selected wordline is stabilized; determine, by the RC measurement circuit, a stabilized voltage at the selected wordline; and estimate, based on the stabilized voltage, an RC time constant of the wordline.Type: ApplicationFiled: June 3, 2022Publication date: September 15, 2022Inventors: Huanyou Zhan, Massimo Rossini, Jun Xu
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Patent number: 11393533Abstract: Described are systems and methods for estimating the resistance-capacitance time constant of an electrical circuit (e.g., of a wordline of a memory device). An example system comprises: a memory device comprising a plurality of memory cells electrically coupled to a plurality of wordlines; a resistance-capacitance (RC) measurement circuit to measure a voltage at a specified wordline of the plurality of wordlines; and a processing device coupled to the memory device. The processing device is configured to: apply an initial voltage to a selected wordline of the plurality of wordlines; discharge the selected wordline for a discharge period of time; float the selected wordline until a voltage at the selected wordline is stabilized; determine, by the RC measurement circuit, a stabilized voltage at the selected wordline; and estimate, based on the stabilized voltage, an RC time constant of the wordline.Type: GrantFiled: February 12, 2021Date of Patent: July 19, 2022Assignee: Micron Technology, Inc.Inventors: Huanyou Zhan, Massimo Rossini, Jun Xu
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Publication number: 20220199180Abstract: A memory device includes a plurality of memory dies, each memory die of the plurality of memory dies comprising a memory array and a power management component, operatively coupled with the memory array. The power management component sends a test value to one or more other power management components on one or more other memory dies of the plurality of memory dies and receives one or more other test values from the one or more other power management components. The power management component compares the test value and the one or more other test values to a set of expected values, and responsive to the test value and the one or more other test values matching the set of expected values, determines that signal connections between the power management component and the one or more other power management components are functional.Type: ApplicationFiled: February 4, 2021Publication date: June 23, 2022Inventors: Eleuterio Mannella, Massimo Rossini
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Publication number: 20170214880Abstract: Described is a method for helping a person to select a furnishing covering surface, comprising the following steps: self-localizing without markers an image acquisition device 2, for determining a pose of the image acquisition device 2; identifying, in at least one image acquired by the image acquisition device 2, a portion of image corresponding to a pre-existing surface to be substituted; segmenting, in one or more images acquired by the image acquisition device 2, at least the portion of image identified; selecting, using a menu displayed on a display 5, a type of furnishing covering surface with which to replace the portion of image previously identified; generating at least one image in which the portion of image is substituted with the type of furnishing covering surface previously selected.Type: ApplicationFiled: July 15, 2015Publication date: July 27, 2017Inventors: FRANCO AMPOLLINI, MASSIMO ROSSINI, ALESSANDRO BEVILACQUA, ALESSANDRO GHERARDI
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Patent number: 9455043Abstract: A memory device has a controller. The controller is configured to cause the memory device to inhibit programming of a group of memory cells. The controller is configured to cause the memory device to apply a programming pulse to control gates of the group of memory cells. The controller is configured to determine an amount of disturb experienced by the group of memory cells responsive to the programming pulse. The controller is configured to determine a program window responsive to the amount of disturb.Type: GrantFiled: March 21, 2016Date of Patent: September 27, 2016Assignee: Micron Technology, Inc.Inventors: Tommaso Vali, Giovanni Santin, Massimo Rossini, William H. Radke, Violante Moschiano
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Publication number: 20160203875Abstract: A memory device has a controller. The controller is configured to cause the memory device to inhibit programming of a group of memory cells. The controller is configured to cause the memory device to apply a programming pulse to control gates of the group of memory cells. The controller is configured to determine an amount of disturb experienced by the group of memory cells responsive to the programming pulse. The controller is configured to determine a program window responsive to the amount of disturb.Type: ApplicationFiled: March 21, 2016Publication date: July 14, 2016Applicant: MICRON TECHNOLOGY, INC.Inventors: Tommaso Vali, Giovanni Santin, Massimo Rossini, William H. Radke, Violante Moschiano
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Patent number: 9305659Abstract: A memory device has an array of memory cells and a controller coupled to the array of memory cells. The controller is configured to determine a program window after a portion of a particular programing operation performed on the memory device is performed and before a subsequent portion of the particular programing operation performed on the memory device is performed. The controller is configured to determine the program window responsive to an amount of program disturb experienced by a particular state of a memory cell. The controller is configured to perform the subsequent portion of the particular programing operation performed on the memory device using the determined program window.Type: GrantFiled: August 14, 2015Date of Patent: April 5, 2016Assignee: Micron Technology, Inc.Inventors: Tommaso Vali, Giovanni Santin, Massimo Rossini, William H. Radke, Violante Moschiano
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Publication number: 20150348643Abstract: A memory device has an array of memory cells and a controller coupled to the array of memory cells. The controller is configured to determine a program window after a portion of a particular programing operation performed on the memory device is performed and before a subsequent portion of the particular programing operation performed on the memory device is performed. The controller is configured to determine the program window responsive to an amount of program disturb experienced by a particular state of a memory cell. The controller is configured to perform the subsequent portion of the particular programing operation performed on the memory device using the determined program window.Type: ApplicationFiled: August 14, 2015Publication date: December 3, 2015Applicant: MICRON TECHNOLOGY, INC.Inventors: Tommaso Vali, Giovanni Santin, Massimo Rossini, William H. Radke, Violante Moschiano
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Patent number: 9129684Abstract: A memory device has an array of memory cells and a controller coupled to the array of memory cells. The controller is configured to determine a program window after a portion of a particular programming operation performed on the memory device is performed and before a subsequent portion of the particular programming operation performed on the memory device is performed. The controller is configured to determine the program window responsive to an amount of program disturb experienced by a particular state of a memory cell. The controller is configured to perform the subsequent portion of the particular programming operation performed on the memory device using the determined program window.Type: GrantFiled: November 11, 2014Date of Patent: September 8, 2015Assignee: Micron Technology, Inc.Inventors: Tommaso Vali, Giovanni Santin, Massimo Rossini, William H. Radke, Violante Moschiano
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Publication number: 20150063031Abstract: A memory device has an array of memory cells and a controller coupled to the array of memory cells. The controller is configured to determine a program window after a portion of a particular programing operation performed on the memory device is performed and before a subsequent portion of the particular programing operation performed on the memory device is performed. The controller is configured to determine the program window responsive to an amount of program disturb experienced by a particular state of a memory cell. The controller is configured to perform the subsequent portion of the particular programing operation performed on the memory device using the determined program window.Type: ApplicationFiled: November 11, 2014Publication date: March 5, 2015Applicant: MICRON TECHNOLOGY, INC.Inventors: Tommaso Vali, Giovanni Santin, Massimo Rossini, William H. Radke, Violante Moschiano
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Patent number: 8902648Abstract: Methods for determining a program window and memory devices are disclosed. One such method for determining the program window measures an amount of program disturb experienced by a particular state and determines the program window responsive to the amount of program disturb.Type: GrantFiled: July 26, 2011Date of Patent: December 2, 2014Assignee: Micron Technology, Inc.Inventors: Tommaso Vali, Giovanni Santin, Massimo Rossini, William H. Radke, Violante Moschiano
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Publication number: 20130028022Abstract: Methods for determining a program window and memory devices are disclosed. One such method for determining the program window measures an amount of program disturb experienced by a particular state and determines the program window responsive to the amount of program disturb.Type: ApplicationFiled: July 26, 2011Publication date: January 31, 2013Inventors: Tommaso VALI, Giovanni Santin, Massimo Rossini, William H. Radke, Violante Moschiano
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Patent number: 7944757Abstract: Embodiments of the present disclosure provide methods, devices, modules, and systems for programming multilevel non-volatile multilevel memory cells. One method includes increasing a threshold voltage (Vt) for each of a number of memory cells until the Vt reaches a verify voltage (VFY) corresponding to a program state among a number of program states. The method includes determining whether the Vt of each of the cells has reached a pre-verify voltage (PVFY) associated with the program state, selectively biasing bit lines coupled to those cells whose Vt has reached the PVFY, adjusting the PVFY to a different level, and selectively biasing bit lines coupled to cells whose Vt has reached the adjusted PVFY, wherein the PVFY and the adjusted PVFY are less than the VFY.Type: GrantFiled: March 5, 2010Date of Patent: May 17, 2011Assignee: Micron Technology, Inc.Inventors: Violante Moschiano, Giovanni Santin, Tommaso Vali, Massimo Rossini
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Publication number: 20100165739Abstract: Embodiments of the present disclosure provide methods, devices, modules, and systems for programming multilevel non-volatile multilevel memory cells. One method includes increasing a threshold voltage (Vt) for each of a number of memory cells until the Vt reaches a verify voltage (VFY) corresponding to a program state among a number of program states. The method includes determining whether the Vt of each of the cells has reached a pre-verify voltage (PVFY) associated with the program state, selectively biasing bit lines coupled to those cells whose Vt has reached the PVFY, adjusting the PVFY to a different level, and selectively biasing bit lines coupled to cells whose Vt has reached the adjusted PVFY, wherein the PVFY and the adjusted PVFY are less than the VFY.Type: ApplicationFiled: March 5, 2010Publication date: July 1, 2010Applicant: MICRON TECHNOLOGY, INC.Inventors: Violante Moschiano, Giovanni Santin, Tommaso Vali, Massimo Rossini
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Patent number: 7692971Abstract: Embodiments of the present disclosure provide methods, devices, modules, and systems for programming multilevel non-volatile multilevel memory cells. One method includes increasing a threshold voltage (Vt) for each of a number of memory cells until the Vt reaches a verify voltage (VFY) corresponding to a program state among a number of program states. The method includes determining whether the Vt of each of the cells has reached a pre-verify voltage (PVFY) associated with the program state, selectively biasing bit lines coupled to those cells whose Vt has reached the PVFY, adjusting the PVFY to a different level, and selectively biasing bit lines coupled to cells whose Vt has reached the adjusted PVFY, wherein the PVFY and the adjusted PVFY are less than the VFY.Type: GrantFiled: February 27, 2008Date of Patent: April 6, 2010Assignee: Micron Technology, Inc.Inventors: Violante Moschiano, Giovanni Santin, Tommaso Vali, Massimo Rossini
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Publication number: 20080239806Abstract: Embodiments of the present disclosure provide methods, devices, modules, and systems for programming multilevel non-volatile multilevel memory cells. One method includes increasing a threshold voltage (Vt) for each of a number of memory cells until the Vt reaches a verify voltage (VFY) corresponding to a program state among a number of program states. The method includes determining whether the Vt of each of the cells has reached a pre-verify voltage (PVFY) associated with the program state, selectively biasing bit lines coupled to those cells whose Vt has reached the PVFY, adjusting the PVFY to a different level, and selectively biasing bit lines coupled to cells whose Vt has reached the adjusted PVFY, wherein the PVFY and the adjusted PVFY are less than the VFY.Type: ApplicationFiled: February 27, 2008Publication date: October 2, 2008Applicant: MICRON TECHNOLOGY, INC.Inventors: Violante Moschiano, Giovanni Santin, Tommaso Vali, Massimo Rossini