Patents by Inventor Massimo Scardaci

Massimo Scardaci has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7139197
    Abstract: The invention relates to a voltage regulation system for multiword programming in non volatile memories, for example of the Flash type, with low circuit area occupation, wherein memories comprise at least a memory cell matrix organized in cell rows and columns and with corresponding circuits responsible for addressing, decoding, reading, writing and erasing the memory cell content. The memory cells have drain terminals connected to matrix columns and are biased in the programming step with a predetermined voltage value by means of program load circuits associated to each matrix column. In parallel with each program load circuit, a conduction-to-ground path is enabled by a controlled active element.
    Type: Grant
    Filed: February 26, 2004
    Date of Patent: November 21, 2006
    Assignee: STMicroelectronics S.r.l.
    Inventors: Ignazio Martines, Massimo Scardaci
  • Publication number: 20040233723
    Abstract: The invention relates to a voltage regulation system for multiword programming in non volatile memories, for example of the Flash type, with low circuit area occupation, wherein memories comprise at least a memory cell matrix organized in cell rows and columns and with corresponding circuits responsible for addressing, decoding, reading, writing and erasing the memory cell content. The memory cells have drain terminals connected to matrix columns and are biased in the programming step with a predetermined voltage value by means of program load circuits associated to each matrix column. In parallel with each program load circuit, a conduction-to-ground path is enabled by a controlled active element.
    Type: Application
    Filed: February 26, 2004
    Publication date: November 25, 2004
    Applicant: STMicroelectronics S.r.l.
    Inventors: Ignazio Martines, Massimo Scardaci
  • Patent number: 6549486
    Abstract: A circuit for generating a constant pulse signal from an enabling ATD input signal may include a latch structure connected between first and second circuit nodes, with each node being coupled to a corresponding charge and discharge capacitance and being also connected to respective inputs of a logic gate. The circuit may also include a memory element coupled to the circuit nodes for filtering the enabling ATD signal and avoiding a partial discharge of one of the capacitances. An output of the logic gate is provided for generating the pulse signal independent of voltage and/or temperature variations affecting the enabling ATD signal.
    Type: Grant
    Filed: October 31, 2001
    Date of Patent: April 15, 2003
    Assignee: STMicroelectronics S.r.l.
    Inventors: Massimo Scardaci, Ignazio Martines