Abstract: A contained resonant cavity. The contained resonant cavity includes a first surface and a second surface that are partially transmissive and partially reflective. One or more reflective sidewalls are positioned between the first surface and the second surface. In a specific embodiment, the first surface and the second surface are substantially parallel and represent input and output surfaces, respectively, of the contained resonant cavity. The one or more sidewalls are approximately perpendicular to the first surface and the second surface and include a first sidewall having a first substantially reflective planar surface that faces a second substantially reflective planar surface of the second sidewall. A fourth sidewall and a fifth sidewall have fourth and fifth substantially reflective facing sidewalls, respectively.

Abstract: A CMOS single phase register includes two pairs of cross coupled CMOS inverters connected together by transistor switches. The first pair of cross-coupled CMOS inverters is connected to a complementary pair of data inputs through a first pair of transistor switches which turn on in response to a first logic level. The complementary outputs of the first pair of cross-coupled CMOS inverters is connected to the inputs of the second pair of cross-coupled CMOS inverters through a second pair of transistor switches which turn on in response to a second logic level. The complementary outputs of the CMOS single phase register of the present invention are the outputs of the second pair of cross-coupled CMOS inverters. The ground connections of the first pair of cross-coupled CMOS inverters is made through a transistor switch which turns on in response to the first logic level.