Patents by Inventor Masud Kamal

Masud Kamal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8725991
    Abstract: The present disclosure includes a multi-threaded processor that includes a first register file associated with a first thread and a second register file associated with a second thread. At least one hardware resource is shared by the first and second register files. In addition, the first thread may have a pipeline access position that is non-sequential to the second thread. A method of accessing a plurality of register files is also disclosed. The method includes reading data from a first register file while concurrently reading data from a second register file. The first register file is associated with a first instruction stream and the second register file is associated with a second instruction stream. The first instruction stream is sequential to the second instruction stream in an execution pipeline of a processor, and the first register file is in a non-adjacent location with respect to the second register file.
    Type: Grant
    Filed: September 12, 2007
    Date of Patent: May 13, 2014
    Assignee: QUALCOMM Incorporated
    Inventors: Lin Wang, Masud Kamal, Paul Bassett, Suresh Venkumahanti, Jian Shen
  • Publication number: 20090070554
    Abstract: The present disclosure includes a multi-threaded processor that includes a first register file associated with a first thread and a second register file associated with a second thread. At least one hardware resource is shared by the first and second register files. In addition, the first thread may have a pipeline access position that is non-sequential to the second thread. A method of accessing a plurality of register files is also disclosed. The method includes reading data from a first register file while concurrently reading data from a second register file. The first register file is associated with a first instruction stream and the second register file is associated with a second instruction stream. The first instruction stream is sequential to the second instruction stream in an execution pipeline of a processor, and the first register file is in a non-adjacent location with respect to the second register file.
    Type: Application
    Filed: September 12, 2007
    Publication date: March 12, 2009
    Applicant: QUALCOMM INCORPORATED
    Inventors: Lin Wang, Masud Kamal, Paul Bassett, Suresh Venkumahanti, Jian Shen
  • Patent number: 6614317
    Abstract: A lock detector system which operates adaptively based on a frequency of operation. Different lock windows are defined for different frequencies of operation and are automatically formed based on the controlled signal that is used to drive the voltage controlled oscillator of the phase locked loop.
    Type: Grant
    Filed: May 24, 2001
    Date of Patent: September 2, 2003
    Assignee: Intel Corporation
    Inventors: Keng L. Wong, Usman Azeez Mughal, Masud Kamal, Chee How Lim, Kent R. Callahan
  • Publication number: 20020175769
    Abstract: A lock detector system which operates adaptively based on a frequency of operation. Different lock windows are defined for different frequencies of operation and are automatically formed based on the controlled signal that is used to drive the voltage controlled oscillator of the phase locked loop.
    Type: Application
    Filed: May 24, 2001
    Publication date: November 28, 2002
    Inventors: Keng L. Wong, Usman Azeez Mughal, Masud Kamal, Chee How Lim, Kent R. Callahan